/*- * Copyright ( c ) 2002 - 2005 Sam Leffler , Errno Consulting * Copyright ( c ) 2004 - 2005 Atheros Communications , Inc . * Copyright ( c ) 2006 Devicescape Software , Inc . * Copyright ( c ) 2007 Jiri Slaby < jirislaby @ gmail . com > * Copyright ( c ) 2007 Luis R . Rodriguez < mcgrof @ winlab . rutgers . edu > * * All rights reserved . * * Redistribution and use in source and binary forms , with or without * modification , are permitted provided that the following conditions * are met : * 1 . Redistributions of source code must retain the above copyright * notice , this list of conditions and the following disclaimer , * without modification . * 2 . Redistributions in binary form must reproduce at minimum a disclaimer * similar to the " NO WARRANTY " disclaimer below ( " Disclaimer " ) and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution . * 3 . Neither the names of the above - listed copyright holders nor the names * of any contributors may be used to endorse or promote products derived * from this software without specific prior written permission . * * Alternatively , this software may be distributed under the terms of the * GNU General Public License ( " GPL " ) version 2 as published by the Free * Software Foundation . * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ` ` AS IS ' ' AND ANY EXPRESS OR IMPLIED WARRANTIES , INCLUDING , BUT NOT * LIMITED TO , THE IMPLIED WARRANTIES OF NONINFRINGEMENT , MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED . IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL , EXEMPLARY , * OR CONSEQUENTIAL DAMAGES ( INCLUDING , BUT NOT LIMITED TO , PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES ; LOSS OF USE , DATA , OR PROFITS ; OR BUSINESS * INTERRUPTION ) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY , WHETHER * IN CONTRACT , STRICT LIABILITY , OR TORT ( INCLUDING NEGLIGENCE OR OTHERWISE ) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE , EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES . * #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt#include <linux/module.h>#include <linux/delay.h>#include <linux/dma-mapping.h>#include <linux/hardirq.h>#include <linux/if .h>#include <linux/io.h>#include <linux/netdevice.h>#include <linux/cache.h>#include <linux/ethtool.h>#include <linux/uaccess.h>#include <linux/slab.h>#include <linux/etherdevice.h>#include <linux/nl80211.h>#include <net/cfg80211.h>#include <net/ieee80211_radiotap.h>#include <linux/unaligned.h>#include <net/mac80211.h>#include "base.h" #include "reg.h" #include "debug.h" #include "ani.h" #include "ath5k.h" #include "../regd.h" #define CREATE_TRACE_POINTS#include "trace.h" bool ath5k_modparam_nohwcrypt;bool , 0444 );"Disable hardware encryption." );static bool modparam_fastchanswitch;bool , 0444 );"Enable fast channel switching for AR2413/AR5413 radios." );static bool ath5k_modparam_no_hw_rfkill_switch;bool , 0444 );"Ignore the GPIO RFKill switch state" );/* Module info */ "Jiri Slaby" );"Nick Kossifidis" );"Support for 5xxx series of Atheros 802.11 wireless LAN cards." );"Dual BSD/GPL" );static int ath5k_init(struct ieee80211_hw *hw);static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,bool skip_pcu);/* Known SREVs */ static const struct ath5k_srev_name srev_names[] = {#ifdef CONFIG_ATH5K_AHB"5312" , AR5K_VERSION_MAC, AR5K_SREV_AR5312_R2 },"5312" , AR5K_VERSION_MAC, AR5K_SREV_AR5312_R7 },"2313" , AR5K_VERSION_MAC, AR5K_SREV_AR2313_R8 },"2315" , AR5K_VERSION_MAC, AR5K_SREV_AR2315_R6 },"2315" , AR5K_VERSION_MAC, AR5K_SREV_AR2315_R7 },"2317" , AR5K_VERSION_MAC, AR5K_SREV_AR2317_R1 },"2317" , AR5K_VERSION_MAC, AR5K_SREV_AR2317_R2 },#else "5210" , AR5K_VERSION_MAC, AR5K_SREV_AR5210 },"5311" , AR5K_VERSION_MAC, AR5K_SREV_AR5311 },"5311A" , AR5K_VERSION_MAC, AR5K_SREV_AR5311A },"5311B" , AR5K_VERSION_MAC, AR5K_SREV_AR5311B },"5211" , AR5K_VERSION_MAC, AR5K_SREV_AR5211 },"5212" , AR5K_VERSION_MAC, AR5K_SREV_AR5212 },"5213" , AR5K_VERSION_MAC, AR5K_SREV_AR5213 },"5213A" , AR5K_VERSION_MAC, AR5K_SREV_AR5213A },"2413" , AR5K_VERSION_MAC, AR5K_SREV_AR2413 },"2414" , AR5K_VERSION_MAC, AR5K_SREV_AR2414 },"5424" , AR5K_VERSION_MAC, AR5K_SREV_AR5424 },"5413" , AR5K_VERSION_MAC, AR5K_SREV_AR5413 },"5414" , AR5K_VERSION_MAC, AR5K_SREV_AR5414 },"2415" , AR5K_VERSION_MAC, AR5K_SREV_AR2415 },"5416" , AR5K_VERSION_MAC, AR5K_SREV_AR5416 },"5418" , AR5K_VERSION_MAC, AR5K_SREV_AR5418 },"2425" , AR5K_VERSION_MAC, AR5K_SREV_AR2425 },"2417" , AR5K_VERSION_MAC, AR5K_SREV_AR2417 },#endif "xxxxx" , AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN },"5110" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 },"5111" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 },"5111A" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5111A },"2111" , AR5K_VERSION_RAD, AR5K_SREV_RAD_2111 },"5112" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5112 },"5112A" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5112A },"5112B" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5112B },"2112" , AR5K_VERSION_RAD, AR5K_SREV_RAD_2112 },"2112A" , AR5K_VERSION_RAD, AR5K_SREV_RAD_2112A },"2112B" , AR5K_VERSION_RAD, AR5K_SREV_RAD_2112B },"2413" , AR5K_VERSION_RAD, AR5K_SREV_RAD_2413 },"5413" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 },"5424" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 },"5133" , AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 },#ifdef CONFIG_ATH5K_AHB"2316" , AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 },"2317" , AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 },#endif "xxxxx" , AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN },static const struct ieee80211_rate ath5k_rates[] = {10 ,20 ,55 ,110 ,60 ,90 ,120 ,180 ,240 ,360 ,480 ,540 ,static inline u64 ath5k_extend_tsf(struct ath5k_hw *ah, u32 rstamp)if ((tsf & 0 x7fff) < rstamp)0 x8000;return (tsf & ~0 x7fff) | rstamp;const char *enum ath5k_srev_type type, u_int16_t val)const char *name = "xxxxx" ;unsigned int i;for (i = 0 ; i < ARRAY_SIZE(srev_names); i++) {if (srev_names[i].sr_type != type)continue ;if ((val & 0 xf0) == srev_names[i].sr_val)if ((val & 0 xff) == srev_names[i].sr_val) {break ;return name;static unsigned int ath5k_ioread32(void *hw_priv, u32 reg_offset)struct ath5k_hw *ah = hw_priv;return ath5k_hw_reg_read(ah, reg_offset);static void ath5k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)struct ath5k_hw *ah = hw_priv;static const struct ath_ops ath5k_common_ops = {/***********************\* Driver Initialization * static void ath5k_reg_notifier(struct wiphy *wiphy,struct regulatory_request *request)struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);struct ath5k_hw *ah = hw->priv;struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);/********************\* Channel / mode setup * /* * Returns true for the channel numbers used . #ifdef CONFIG_ATH5K_TEST_CHANNELSstatic bool ath5k_is_standard_channel(short chan, enum nl80211_band band)return true ;#else static bool ath5k_is_standard_channel(short chan, enum nl80211_band band)if (band == NL80211_BAND_2GHZ && chan <= 14 )return true ;return /* UNII 1,2 */ 3 ) == 0 && chan >= 36 && chan <= 64 ) ||/* midband */ 3 ) == 0 && chan >= 100 && chan <= 140 ) ||/* UNII-3 */ 3 ) == 1 && chan >= 149 && chan <= 165 ) ||/* 802.11j 5.030-5.080 GHz (20MHz) */ 8 || chan == 12 || chan == 16 ) ||/* 802.11j 4.9GHz (20MHz) */ 184 || chan == 188 || chan == 192 || chan == 196 ));#endif static unsigned int struct ath5k_hw *ah, struct ieee80211_channel *channels,unsigned int mode, unsigned int max)unsigned int count, size, freq, ch;enum nl80211_band band;switch (mode) {case AR5K_MODE_11A:/* 1..220, but 2GHz frequencies are filtered by check_channel */ 220 ;break ;case AR5K_MODE_11B:case AR5K_MODE_11G:26 ;break ;default :"bad mode, not copying channels\n" );return 0 ;0 ;for (ch = 1 ; ch <= size && count < max; ch++) {if (freq == 0 ) /* mapping failed - not a standard channel */ continue ;/* Write channel info, needed for ath5k_channel_ok() */ /* Check if channel is supported by the chipset */ if (!ath5k_channel_ok(ah, &channels[count]))continue ;if (!ath5k_is_standard_channel(ch, band))continue ;return count;static void struct ath5k_hw *ah, struct ieee80211_supported_band *b)for (i = 0 ; i < AR5K_MAX_RATES; i++)1 ;for (i = 0 ; i < b->n_bitrates; i++) {if (b->bitrates[i].hw_value_short)static int struct ieee80211_hw *hw)struct ath5k_hw *ah = hw->priv;struct ieee80211_supported_band *sband;int max_c, count_c = 0 ;int i;/* 2GHz band */ 0 ];if (test_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode)) {/* G mode */ 0 ],sizeof (struct ieee80211_rate) * 12 );12 ;else if (test_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode)) {/* B mode */ 0 ],sizeof (struct ieee80211_rate) * 4 );4 ;/* 5211 only supports B rates and uses 4bit rate codes * ( e . g normally we have 0 x1B for 1 M , but on 5211 we have 0 x0B ) * fix them up here : if (ah->ah_version == AR5K_AR5211) {for (i = 0 ; i < 4 ; i++) {0 xF;0 xF;/* 5GHz band, A mode */ if (test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)) {0 ];4 ],sizeof (struct ieee80211_rate) * 8 );8 ;return 0 ;/* * Set / change channels . We always reset the chip . * To accomplish this we must first cleanup any pending DMA , * then restart stuff after a la ath5k_init . * * Called with ah - > lock . int struct ath5k_hw *ah, struct cfg80211_chan_def *chandef)"channel set, resetting (%u -> %u MHz)\n" ,switch (chandef->width) {case NL80211_CHAN_WIDTH_20:case NL80211_CHAN_WIDTH_20_NOHT:break ;case NL80211_CHAN_WIDTH_5:break ;case NL80211_CHAN_WIDTH_10:break ;default :1 );return -EINVAL;/* * To switch channels clear any pending DMA operations ; * wait long enough for the RX fifo to drain , reset the * hardware at the new frequency , and then re - enable * the relevant bits of the h / w . return ath5k_reset(ah, chandef->chan, true );void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)struct ath5k_vif_iter_data *iter_data = data;int i;struct ath5k_vif *avf = (void *)vif->drv_priv;if (iter_data->hw_macaddr)for (i = 0 ; i < ETH_ALEN; i++)if (!iter_data->found_active) {true ;if (iter_data->need_set_hw_addr && iter_data->hw_macaddr)if (ether_addr_equal(iter_data->hw_macaddr, mac))false ;if (!iter_data->any_assoc) {if (avf->assoc)true ;/* Calculate combined mode - when APs are active, operate in AP mode. * Otherwise use the mode of the new interface . This can currently * only deal with combinations of APs and STAs . Only one ad - hoc * interfaces is allowed . if (avf->opmode == NL80211_IFTYPE_AP)else {if (avf->opmode == NL80211_IFTYPE_STATION)if (iter_data->opmode == NL80211_IFTYPE_UNSPECIFIED)void struct ath5k_hw *ah,struct ieee80211_vif *vif)struct ath_common *common = ath5k_hw_common(ah);struct ath5k_vif_iter_data iter_data;/* * Use the hardware MAC address as reference , the hardware uses it * together with the BSSID mask when matching addresses . false ;true ;0 ;if (vif)/* Get list of all active MAC addresses */ if (ah->opmode == NL80211_IFTYPE_UNSPECIFIED)/* Nothing active, default to station mode */ "mode setup opmode %d (%s)\n" ,if (iter_data.need_set_hw_addr && iter_data.found_active)if (ath5k_hw_hasbssidmask(ah))/* Set up RX Filter */ if (iter_data.n_stas > 1 ) {/* If you have multiple STA interfaces connected to * different APs , ARPs are not received ( most of the time ? ) * Enabling PROMISC appears to fix that problem . "RX filter 0x%x\n" , rfilt);static inline int struct ath5k_hw *ah, int hw_rix)int rix;/* return base rate on errors */ if (WARN(hw_rix < 0 || hw_rix >= AR5K_MAX_RATES,"hw_rix out of bounds: %x\n" , hw_rix))return 0 ;if (WARN(rix < 0 , "invalid hw_rix: %x\n" , hw_rix))0 ;return rix;/***************\* Buffers setup * static struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_hw *ah, dma_addr_t *skb_addr)struct ath_common *common = ath5k_hw_common(ah);struct sk_buff *skb;/* * Allocate buffer with headroom_needed space for the * fake physical layer header at the start . if (!skb) {"can't alloc skbuff of size %u\n" ,return NULL;if (unlikely(dma_mapping_error(ah->dev, *skb_addr))) {"%s: DMA mapping failed\n" , __func__);return NULL;return skb;static int struct ath5k_hw *ah, struct ath5k_buf *bf)struct sk_buff *skb = bf->skb;struct ath5k_desc *ds;int ret;if (!skb) {if (!skb)return -ENOMEM;/* * Setup descriptors . For receive we always terminate * the descriptor list with a self - linked entry so we ' ll * not get overrun under high load ( as can happen with a * 5212 when ANI processing enables PHY error frames ) . * * To ensure the last descriptor is self - linked we create * each descriptor as self - linked and add it to the end . As * each additional descriptor is added the previous self - linked * entry is " fixed " naturally . This should be safe even * if DMA is happening . When processing RX interrupts we * never remove / process the last , self - linked , entry on the * descriptor list . This ensures the hardware always has * someplace to write a new frame . /* link to self */ 0 );if (ret) {"%s: could not setup RX desc\n" , __func__);return ret;if (ah->rxlink != NULL)return 0 ;static enum ath5k_pkt_type get_hw_packet_type(struct sk_buff *skb)struct ieee80211_hdr *hdr;enum ath5k_pkt_type htype;struct ieee80211_hdr *)skb->data;if (ieee80211_is_beacon(fc))else if (ieee80211_is_probe_resp(fc))else if (ieee80211_is_atim(fc))else if (ieee80211_is_pspoll(fc))else return htype;static struct ieee80211_rate *const struct ieee80211_hw *hw,const struct ieee80211_tx_info *info,struct ath5k_buf *bf, int idx)/* * convert a ieee80211_tx_rate RC - table entry to * the respective ieee80211_rate struct if (bf->rates[idx].idx < 0 ) {return NULL;return &hw->wiphy->bands[info->band]->bitrates[ bf->rates[idx].idx ];static u16const struct ieee80211_hw *hw,const struct ieee80211_tx_info *info,struct ath5k_buf *bf, int idx)struct ieee80211_rate *rate;if (!rate)return 0 ;return hw_rate;static bool ath5k_merge_ratetbl(struct ieee80211_sta *sta,struct ath5k_buf *bf,struct ieee80211_tx_info *tx_info)struct ieee80211_sta_rates *ratetbl;if (!sta)return false ;if (!ratetbl)return false ;if (tx_info->control.rates[0 ].idx < 0 ||0 ].count == 0 )0 ;else {0 ] = tx_info->control.rates[0 ];1 ;for ( ; i < IEEE80211_TX_MAX_RATES; i++) {if (tx_info->control.use_rts)else if (tx_info->control.use_cts_prot)else return true ;static int struct ath5k_hw *ah, struct ath5k_buf *bf,struct ath5k_txq *txq, int padsize,struct ieee80211_tx_control *control)struct ath5k_desc *ds = bf->desc;struct sk_buff *skb = bf->skb;struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);unsigned int pktlen, flags, keyidx = AR5K_TXKEYIX_INVALID;struct ieee80211_rate *rate;struct ieee80211_sta *sta;unsigned int mrr_rate[3 ], mrr_tries[3 ];int i, ret;0 ;0 ;/* XXX endianness */ if (dma_mapping_error(ah->dev, bf->skbaddr))return -ENOSPC;if (control)else if (!ath5k_merge_ratetbl(sta, bf, info)) {0 );if (!rate) {goto err_unmap;if (info->flags & IEEE80211_TX_CTL_NO_ACK)0 ].flags;0 );/* FIXME: If we are in g mode and rate is a CCK rate * subtract ah - > ah_txpower . txp_cck_ofdm_pwr_delta if (info->control.hw_key) {if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {2 ),0 ].count, keyidx, ah->ah_tx_ant, flags,if (ret)goto err_unmap;/* Set up MRR descriptor */ if (ah->ah_capabilities.cap_has_mrr_support) {0 , sizeof (mrr_rate));0 , sizeof (mrr_tries));for (i = 0 ; i < 3 ; i++) {if (!rate)break ;0 ], mrr_tries[0 ],1 ], mrr_tries[1 ],2 ], mrr_tries[2 ]);0 ;if (txq->link == NULL) /* is this first packet? */ else /* no, so only link it */ return 0 ;return ret;/*******************\* Descriptors setup * static int struct ath5k_hw *ah)struct ath5k_desc *ds;struct ath5k_buf *bf;unsigned int i;int ret;/* allocate descriptors */ sizeof (struct ath5k_desc) *1 );if (ah->desc == NULL) {"can't allocate descriptors\n" );goto err;"DMA map: %p (%zu) -> %llx\n" ,unsigned long long )ah->desc_daddr);1 + ATH_TXBUF + ATH_RXBUF + ATH_BCBUF,sizeof (struct ath5k_buf), GFP_KERNEL);if (bf == NULL) {"can't allocate bufptr\n" );goto err_free;for (i = 0 ; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof (*ds)) {for (i = 0 ; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof (*ds)) {/* beacon buffers */ for (i = 0 ; i < ATH_BCBUF; i++, bf++, ds++, da += sizeof (*ds)) {return 0 ;return ret;void struct ath5k_hw *ah, struct ath5k_buf *bf)if (!bf->skb)return ;0 ;0 ;void struct ath5k_hw *ah, struct ath5k_buf *bf)struct ath_common *common = ath5k_hw_common(ah);if (!bf->skb)return ;0 ;0 ;static void struct ath5k_hw *ah)struct ath5k_buf *bf;/* Free memory associated with all descriptors */ 0 ;/**************\* Queues setup * static struct ath5k_txq *struct ath5k_hw *ah,int qtype, int subtype)struct ath5k_txq *txq;struct ath5k_txq_info qi = {/* XXX: default values not correct for B and XR channels, int qnum;/* * Enable interrupts only for EOL and DESC conditions . * We mark tx descriptors to receive a DESC interrupt * when a tx queue gets deep ; otherwise we wait for the * EOL to reap descriptors . Note that this is done to * reduce interrupt load and this only defers reaping * descriptors , never transmitting frames . Aside from * reducing interrupts this also permits more concurrency . * The only potential downside is if the tx queue backs * up in which case the top half of the kernel may backup * due to a lack of tx descriptors . if (qnum < 0 ) {/* * NB : don ' t print a message , this happens * normally on parts with too few tx queues return ERR_PTR(qnum);if (!txq->setup) {true ;0 ;false ;0 ;return &ah->txqs[qnum];static int struct ath5k_hw *ah)struct ath5k_txq_info qi = {/* XXX: default values not correct for B and XR channels, /* NB: for dynamic turbo, don't enable any other interrupts */ return ath5k_hw_setup_tx_queue(ah, AR5K_TX_QUEUE_BEACON, &qi);static int struct ath5k_hw *ah)struct ath5k_txq_info qi;int ret;if (ret)goto err;if (ah->opmode == NL80211_IFTYPE_AP ||/* * Always burst out beacon and CAB traffic * ( aifs = cwmin = cwmax = 0 ) 0 ;0 ;0 ;else if (ah->opmode == NL80211_IFTYPE_ADHOC) {/* * Adhoc mode ; backoff between 0 and ( 2 * cw_min ) . 0 ;0 ;2 * AR5K_TUNE_CWMIN;"beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n" ,if (ret) {"%s: unable to update parameters for beacon " "hardware queue!\n" , __func__);goto err;/* push to h/w */ if (ret)goto err;/* reconfigure cabq with ready time to 80% of beacon_interval */ if (ret)goto err;80 ) / 100 ;if (ret)goto err;return ret;/** * ath5k_drain_tx_buffs - Empty tx buffers * * @ ah : The & struct ath5k_hw * * Empty tx buffers from all queues in preparation * of a reset or during shutdown . * * NB : this assumes output has been stopped and * we do not need to block ath5k_tx_tasklet static void struct ath5k_hw *ah)struct ath5k_txq *txq;struct ath5k_buf *bf, *bf0;int i;for (i = 0 ; i < ARRAY_SIZE(ah->txqs); i++) {if (ah->txqs[i].setup) {false ;static void struct ath5k_hw *ah)struct ath5k_txq *txq = ah->txqs;unsigned int i;for (i = 0 ; i < ARRAY_SIZE(ah->txqs); i++, txq++)if (txq->setup) {false ;/*************\* RX Handling * /* * Enable the receive h / w following a reset . static int struct ath5k_hw *ah)struct ath_common *common = ath5k_hw_common(ah);struct ath5k_buf *bf;int ret;"cachelsz %u rx_bufsize %u\n" ,if (ret != 0 ) {goto err;struct ath5k_buf, list);/* enable recv descriptors */ /* set filters, etc. */ /* re-enable PCU/DMA engine */ return 0 ;return ret;/* * Disable the receive logic on PCU ( DRU ) * In preparation for a shutdown . * * Note : Doesn ' t stop rx DMA , ath5k_hw_dma_stop * does . static void struct ath5k_hw *ah)0 ); /* clear recv filter */ /* disable PCU */ static unsigned int struct ath5k_hw *ah, struct sk_buff *skb,struct ath5k_rx_status *rs)struct ath_common *common = ath5k_hw_common(ah);struct ieee80211_hdr *hdr = (void *)skb->data;unsigned int keyix, hlen;if (!(rs->rs_status & AR5K_RXERR_DECRYPT) &&return RX_FLAG_DECRYPTED;/* Apparently when a default key is used to decrypt the packet the hw does not set the index used to decrypt . In such cases if (ieee80211_has_protected(hdr->frame_control) &&4 ) {3 ] >> 6 ;if (test_bit(keyix, common->keymap))return RX_FLAG_DECRYPTED;return 0 ;static void struct ath5k_hw *ah, struct sk_buff *skb,struct ieee80211_rx_status *rxs)struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;if (le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS) {/* * Received an IBSS beacon with the same BSSID . Hardware * must * * have updated the local TSF . We have to work around various * hardware bugs , though . . . "beacon %llx mactime %llx (diff %lld) tsf now %llx\n" ,unsigned long long )bc_tstamp,unsigned long long )rxs->mactime,unsigned long long )(rxs->mactime - bc_tstamp),unsigned long long )tsf);/* * Sometimes the HW will give us a wrong tstamp in the rx * status , causing the timestamp extension to go wrong . * ( This seems to happen especially with beacon frames bigger * than 78 byte ( incl . FCS ) ) * But we know that the receive timestamp must be later than the * timestamp of the beacon since HW must have synced to that . * * NOTE : here we assume mactime to be after the frame was * received , not like mac80211 which defines it at the start . if (bc_tstamp > rxs->mactime) {"fixing mactime from %llx to %llx\n" ,unsigned long long )rxs->mactime,unsigned long long )tsf);/* * Local TSF might have moved higher than our beacon timers , * in that case we have to update them to continue sending * beacons . This also takes care of synchronizing beacon sending * times with other stations . if (hw_tu >= ah->nexttbtt)/* Check if the beacon timers are still correct, because a TSF * update might have created a window between them - for a if (!ath5k_hw_check_beacon_timers(ah, ah->bintval)) {"fixed beacon timers after beacon receive\n" );/* * Compute padding position . skb must contain an IEEE 802 . 11 frame static int ath5k_common_padpos(struct sk_buff *skb)struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;int padpos = 24 ;if (ieee80211_has_a4(frame_control))if (ieee80211_is_data_qos(frame_control))return padpos;/* * This function expects an 802 . 11 frame and returns the number of * bytes added , or - 1 if we don ' t have enough header room . static int ath5k_add_padding(struct sk_buff *skb)int padpos = ath5k_common_padpos(skb);int padsize = padpos & 3 ;if (padsize && skb->len > padpos) {if (skb_headroom(skb) < padsize)return -1 ;return padsize;return 0 ;/* * The MAC header is padded to have 32 - bit boundary if the * packet payload is non - zero . The general calculation for * padsize would take into account odd header lengths : * padsize = 4 - ( hdrlen & 3 ) ; however , since only * even - length headers are used , padding can only be 0 or 2 * bytes and we can optimize this a bit . We must not try to * remove padding from short control frames that do not have a * payload . * * This function expects an 802 . 11 frame and returns the number of * bytes removed . static int ath5k_remove_padding(struct sk_buff *skb)int padpos = ath5k_common_padpos(skb);int padsize = padpos & 3 ;if (padsize && skb->len >= padpos + padsize) {return padsize;return 0 ;static void struct ath5k_hw *ah, struct sk_buff *skb,struct ath5k_rx_status *rs)struct ieee80211_rx_status *rxs;struct ath_common *common = ath5k_hw_common(ah);0 ;if (unlikely(rs->rs_status & AR5K_RXERR_MIC))if (unlikely(rs->rs_status & AR5K_RXERR_CRC))/* * always extend the mac timestamp , since this information is * also needed for proper IBSS merging . * * XXX : it might be too late to do it here , since rs_tstamp is * 15 bit only . that means TSF extension has to be done within * 32768 usec ( about 32 ms ) . it might be necessary to move this to * the interrupt handler , like it is done in madwifi . if (rs->rs_antenna > 0 && rs->rs_antenna < 5 )else 0 ]++; /* invalid */ switch (ah->ah_bwmode) {case AR5K_BWMODE_5MHZ:break ;case AR5K_BWMODE_10MHZ:break ;default :break ;if (rs->rs_rate ==if (ath_is_mybeacon(common, (struct ieee80211_hdr *)skb->data)) {/* check beacons in IBSS mode */ if (ah->opmode == NL80211_IFTYPE_ADHOC)/** ath5k_frame_receive_ok() - Do we want to receive this frame or not? * * Check if we want to further process this frame or not . Also update * statistics . Return true if we want this frame , false if not . static bool struct ath5k_hw *ah, struct ath5k_rx_status *rs)if (unlikely(rs->rs_status)) {unsigned int filters;if (rs->rs_status & AR5K_RXERR_CRC)if (rs->rs_status & AR5K_RXERR_FIFO)if (rs->rs_status & AR5K_RXERR_PHY) {if (rs->rs_phyerr > 0 && rs->rs_phyerr < 32 )/* * Treat packets that underwent a CCK or OFDM reset as having a bad CRC . * These restarts happen when the radio resynchronizes to a stronger frame * while receiving a weaker frame . Here we receive the prefix of the weak * frame . Since these are incomplete packets , mark their CRC as invalid . if (rs->rs_phyerr == AR5K_RX_PHY_ERROR_OFDM_RESTART ||else {return false ;if (rs->rs_status & AR5K_RXERR_DECRYPT) {/* * Decrypt error . If the error occurred * because there was no hardware key , then * let the frame through so the upper layers * can process it . This is necessary for 5210 * parts which have no way to setup a ` ` clear ' ' * key cache entry . * * XXX do key cache faulting if (rs->rs_keyix == AR5K_RXKEYIX_INVALID &&return true ;if (rs->rs_status & AR5K_RXERR_MIC) {return true ;/* * Reject any frames with non - crypto errors , and take into account the * current FIF_ * filters . if (ah->fif_filter_flags & FIF_FCSFAIL)if (rs->rs_status & ~filters)return false ;if (unlikely(rs->rs_more)) {return false ;return true ;static void struct ath5k_hw *ah)enum ath5k_int imask;unsigned long flags;if (test_bit(ATH_STAT_RESET, ah->status))return ;if (ah->rx_pending)if (ah->tx_pending)static void struct tasklet_struct *t)struct ath5k_rx_status rs = {};struct sk_buff *skb, *next_skb;struct ath5k_hw *ah = from_tasklet(ah, t, rxtq);struct ath_common *common = ath5k_hw_common(ah);struct ath5k_buf *bf;struct ath5k_desc *ds;int ret;if (list_empty(&ah->rxbuf)) {"empty rx buf pool\n" );goto unlock;do {struct ath5k_buf, list);/* bail if HW is still using self-linked descriptor */ if (ath5k_hw_get_rxdp(ah) == bf->daddr)break ;if (unlikely(ret == -EINPROGRESS))break ;else if (unlikely(ret)) {"error in processing rx descriptor\n" );break ;if (ath5k_receive_frame_ok(ah, &rs)) {/* * If we can ' t replace bf - > skb with a new skb under * memory pressure , just skip this packet if (!next_skb)goto next;while (ath5k_rxbuf_setup(ah, bf) == 0 );false ;/*************\* TX Handling * void struct ieee80211_hw *hw, struct sk_buff *skb,struct ath5k_txq *txq, struct ieee80211_tx_control *control)struct ath5k_hw *ah = hw->priv;struct ath5k_buf *bf;unsigned long flags;int padsize;/* * The hardware expects the header padded to 4 byte boundaries . * If this is not the case , we add the padding after the header . if (padsize < 0 ) {"tx hdrlen not %%4: not enough" " headroom to pad" );goto drop_packet;if (txq->txq_len >= txq->txq_max &&if (list_empty(&ah->txbuf)) {"no further txbuf available, dropping packet\n" );goto drop_packet;struct ath5k_buf, list);if (list_empty(&ah->txbuf))if (ath5k_txbuf_setup(ah, bf, txq, padsize, control)) {goto drop_packet;return ;static void struct ath5k_hw *ah, struct sk_buff *skb,struct ath5k_txq *txq, struct ath5k_tx_status *ts,struct ath5k_buf *bf)struct ieee80211_tx_info *info;3 ];int i;int size = 0 ;int , sizeof (info->status.rates), sizeof (bf->rates));0 ] = info->status.rates[0 ].count;1 ] = info->status.rates[1 ].count;2 ] = info->status.rates[2 ].count;for (i = 0 ; i < ts->ts_final_idx; i++) {struct ieee80211_tx_rate *r =1 ].idx = -1 ;if (unlikely(ts->ts_status)) {if (ts->ts_status & AR5K_TXERR_FILT) {if (ts->ts_status & AR5K_TXERR_XRETRY)if (ts->ts_status & AR5K_TXERR_FIFO)else {/* count the successful attempt as well */ /* * Remove MAC header padding before giving the frame * back to mac80211 . if (ts->ts_antenna > 0 && ts->ts_antenna < 5 )else 0 ]++; /* invalid */ static void struct ath5k_hw *ah, struct ath5k_txq *txq)struct ath5k_tx_status ts = {};struct ath5k_buf *bf, *bf0;struct ath5k_desc *ds;struct sk_buff *skb;int ret;false ;/* skb might already have been processed last time. */ if (bf->skb != NULL) {if (unlikely(ret == -EINPROGRESS))break ;else if (unlikely(ret)) {"error %d while processing " "queue %u\n" , ret, txq->qnum);break ;/* * It ' s possible that the hardware can say the buffer is * completed when it hasn ' t yet loaded the ds_link from * host memory and moved on . * Always keep the last descriptor to avoid HW races . . . if (ath5k_hw_get_txdp(ah, txq->qnum) != bf->daddr) {if (txq->txq_len < ATH5K_TXQ_LEN_LOW && txq->qnum < 4 )static void struct tasklet_struct *t)int i;struct ath5k_hw *ah = from_tasklet(ah, t, txtq);for (i = 0 ; i < AR5K_NUM_TX_QUEUES; i++)if (ah->txqs[i].setup && (ah->ah_txq_isr_txok_all & BIT(i)))false ;/*****************\* Beacon handling * /* * Setup the beacon frame for transmit . static int struct ath5k_hw *ah, struct ath5k_buf *bf)struct sk_buff *skb = bf->skb;struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);struct ath5k_desc *ds;int ret = 0 ;const int padsize = 0 ;"skb %p [data %p len %u] " "skbaddr %llx\n" , skb, skb->data, skb->len,unsigned long long )bf->skbaddr);if (dma_mapping_error(ah->dev, bf->skbaddr)) {"beacon DMA mapping failed\n" );return -EIO;if (ah->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) {/* self-linked */ else 0 ;/* * If we use multiple antennas on AP and use * the Sectored AP scenario , switch antenna every * 4 beacons to make sure everybody hears our AP . * When a client tries to associate , hw will keep * track of the tx antenna to be used for this client * automatically , based on ACKed packets . * * Note : AP still listens and transmits RTS on the * default antenna which is supposed to be an omni . * * Note2 : On sectored scenarios it ' s possible to have * multiple antennas ( 1 omni - - the default - - and 14 * sectors ) , so if we choose to actually support this * mode , we need to allow the user to set how many antennas * we have and tweak the code below to send beacons * on all of them . if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP)4 ? 2 : 1 ;/* FIXME: If we are in g mode and rate is a CCK rate * subtract ah - > ah_txpower . txp_cck_ofdm_pwr_delta 2 ),1 , AR5K_TXKEYIX_INVALID,0 , 0 );if (ret)goto err_unmap;return 0 ;return ret;/* * Updates the beacon that is sent by ath5k_beacon_send . For adhoc , * this is called only once at config_bss time , for AP we do it every * SWBA interrupt so that the TIM will reflect buffered frames . * * Called with the beacon lock . int struct ieee80211_hw *hw, struct ieee80211_vif *vif)int ret;struct ath5k_hw *ah = hw->priv;struct ath5k_vif *avf;struct sk_buff *skb;if (WARN_ON(!vif)) {goto out;0 );if (!skb) {goto out;void *)vif->drv_priv;return ret;/* * Transmit a beacon frame at SWBA . Dynamic updates to the * frame contents are done as needed and the slot time is * also adjusted based on current state . * * This is called from software irq context ( beacontq tasklets ) * or user context from ath5k_beacon_config . static void struct ath5k_hw *ah)struct ieee80211_vif *vif;struct ath5k_vif *avf;struct ath5k_buf *bf;struct sk_buff *skb;int err;"in beacon_send\n" );/* * Check if the previous beacon has gone out . If * not , don ' t try to post another : skip this * period and wait for the next . Missed beacons * indicate a problem and should not occur . If we * miss too many consecutive beacons reset the device . if (unlikely(ath5k_hw_num_tx_pending(ah, ah->bhalq) != 0 )) {"missed %u consecutive beacons\n" , ah->bmisscount);if (ah->bmisscount > 10 ) { /* NB: 10 is a guess */ "stuck beacon time (%u missed)\n" ,"stuck beacon, resetting\n" );return ;if (unlikely(ah->bmisscount != 0 )) {"resume beacon xmit after %u misses\n" ,0 ;if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs +1 ) ||int slot = ((tsftu % ah->bintval) * ATH_BCBUF) / ah->bintval;1 ) % ATH_BCBUF];"tsf %llx tsftu %x intval %u slot %u vif %p\n" ,unsigned long long )tsf, tsftu, ah->bintval, slot, vif);else /* only one interface */ 0 ];if (!vif)return ;void *)vif->drv_priv;/* * Stop any current dma and put the new frame on the queue . * This should never fail since we check above that no frames * are still pending on the queue . if (unlikely(ath5k_hw_stop_beacon_queue(ah, ah->bhalq))) {"beacon queue %u didn't start/stop ?\n" , ah->bhalq);/* NB: hw still stops DMA, so proceed */ /* refresh the beacon for AP or MESH mode */ if (ah->opmode == NL80211_IFTYPE_AP ||if (err)return ;if (unlikely(bf->skb == NULL || ah->opmode == NL80211_IFTYPE_STATION ||"bf=%p bf_skb=%p\n" , bf, bf->skb);return ;"TXDP[%u] = %llx (%p)\n" ,unsigned long long )bf->daddr, bf->desc);while (skb) {if (ah->cabq->txq_len >= ah->cabq->txq_max)break ;/** * ath5k_beacon_update_timers - update beacon timers * * @ ah : struct ath5k_hw pointer we are operating on * @ bc_tsf : the timestamp of the beacon . 0 to reset the TSF . - 1 to perform a * beacon timer update based on the current HW TSF . * * Calculate the next target beacon transmit time ( TBTT ) based on the timestamp * of a received beacon or the current local hardware TSF and write it to the * beacon timer registers . * * This is called in a variety of situations , e . g . when a beacon is received , * when a TSF update has been detected , but also when an new IBSS is created or * when we otherwise know we have to update the timers , but we keep it in this * function to have it all together in one place . void struct ath5k_hw *ah, u64 bc_tsf)if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs1 ) {/* staggered multi-bss beacons */ if (intval < 15 )"intval %u is too low, min 15\n" ,if (WARN_ON(!intval))return ;/* beacon TSF converted to TU */ /* current TSF converted to TU */ #define FUDGE (AR5K_TUNE_SW_BEACON_RESP + 3 )/* We use FUDGE to make sure the next TBTT is ahead of the current TU. * Since we later subtract AR5K_TUNE_SW_BEACON_RESP ( 10 ) in the timer if (bc_tsf == -1 ) {/* * no beacons received , called internally . * just need to refresh timers based on HW TSF . else if (bc_tsf == 0 ) {/* * no beacon received , probably called by ath5k_reset_tsf ( ) . * reset TSF to start with 0 . else if (bc_tsf > hw_tsf) {/* * beacon received , SW merge happened but HW TSF not yet updated . * not possible to reconfigure timers yet , but next time we * receive a beacon with the same BSSID , the hardware will * automatically update the TSF and then we need to reconfigure * the timers . "need to wait for HW TSF sync\n" );return ;else {/* * most important case for beacon synchronization between STA . * * beacon received and HW TSF has been already updated by HW . * update next TBTT based on the TSF of the beacon , but make * sure it is ahead of our local TSF timer . #undef FUDGE/* * debugging output last in order to preserve the time critical aspect * of this function if (bc_tsf == -1 )"reconfigured timers based on HW TSF\n" );else if (bc_tsf == 0 )"reset HW TSF and timers\n" );else "updated timers based on beacon TSF\n" );"bc_tsf %llx hw_tsf %llx bc_tu %u hw_tu %u nexttbtt %u\n" ,unsigned long long ) bc_tsf,unsigned long long ) hw_tsf, bc_tu, hw_tu, nexttbtt);"intval %u %s %s\n" ,"AR5K_BEACON_ENA" : "" ,"AR5K_BEACON_RESET_TSF" : "" );/** * ath5k_beacon_config - Configure the beacon queues and interrupts * * @ ah : struct ath5k_hw pointer we are operating on * * In IBSS mode we use a self - linked tx descriptor if possible . We enable SWBA * interrupts to detect TSF updates only . void struct ath5k_hw *ah)0 ;if (ah->enable_beacon) {/* * In IBSS mode we use a self - linked tx descriptor and let the * hardware send the beacons automatically . We have to load it * only once here . * We use the SWBA interrupt only to keep track of the beacon * timers in order to detect automatic TSF updates . if (ah->opmode == NL80211_IFTYPE_ADHOC) {if (ath5k_hw_hasveol(ah))else 1 );else {static void ath5k_tasklet_beacon(struct tasklet_struct *t)struct ath5k_hw *ah = from_tasklet(ah, t, beacontq);/* * Software beacon alert - - time to send a beacon . * * In IBSS mode we use this interrupt just to * keep track of the next TBTT ( target beacon * transmission time ) in order to detect whether * automatic TSF updates happened . if (ah->opmode == NL80211_IFTYPE_ADHOC) {/* XXX: only if VEOL supported */ "SWBA nexttbtt: %x hw_tu: %x " "TSF: %llx\n" ,unsigned long long ) tsf);else {/********************\* Interrupt handling * static void struct ath5k_hw *ah)if (time_is_before_eq_jiffies(ah->ah_cal_next_ani) &&/* Run ANI only when calibration is not active */ else if (time_is_before_eq_jiffies(ah->ah_cal_next_short) &&/* Run calibration only when another calibration * is not running . * * Note : This is for both full / short calibration , * if it ' s time for a full one , ath5k_calibrate_work will deal /* we could use SWI to generate enough interrupts to meet our * calibration interval requirements , if necessary : static void struct ath5k_hw *ah)true ;static void struct ath5k_hw *ah)true ;static irqreturn_tint irq, void *dev_id)struct ath5k_hw *ah = dev_id;enum ath5k_int status;unsigned int counter = 1000 ;/* * If hw is not ready ( or detached ) and we get an * interrupt , or if we have no interrupts pending * ( that means it ' s not for us ) skip it . * * NOTE : Group 0 / 1 PCI interface registers are not * supported on WiSOCs , so we can ' t check for pending * interrupts ( ISR belongs to another register group * so we are ok ) . if (unlikely(test_bit(ATH_STAT_INVALID, ah->status) ||return IRQ_NONE;/** Main loop **/ do {/* NB: clears IRQ too */ "status 0x%x/0x%x\n" ,/* * Fatal hw error - > Log and reset * * Fatal errors are unrecoverable so we have to * reset the card . These errors include bus and * dma errors . if (unlikely(status & AR5K_INT_FATAL)) {"fatal int, resetting\n" );/* * RX Overrun - > Count and reset if needed * * Receive buffers are full . Either the bus is busy or * the CPU is not fast enough to process all received * frames . else if (unlikely(status & AR5K_INT_RXORN)) {/* * Older chipsets need a reset to come out of this * condition , but we treat it as RX for newer chips . * We don ' t know exactly which versions need a reset * this guess is copied from the HAL . if (ah->ah_mac_srev < AR5K_SREV_AR5212) {"rx overrun, resetting\n" );else else {/* Software Beacon Alert -> Schedule beacon tasklet */ if (status & AR5K_INT_SWBA)/* * No more RX descriptors - > Just count * * NB : the hardware should re - read the link when * RXE bit is written , but it doesn ' t work at * least on older hardware revs . if (status & AR5K_INT_RXEOL)/* TX Underrun -> Bump tx trigger level */ if (status & AR5K_INT_TXURN)true );/* RX -> Schedule rx tasklet */ if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR))/* TX -> Schedule tx tasklet */ if (status & (AR5K_INT_TXOK/* Missed beacon -> TODO if ( status & AR5K_INT_BMISS ) /* MIB event -> Update counters and notify ANI */ if (status & AR5K_INT_MIB) {/* GPIO -> Notify RFKill layer */ if (status & AR5K_INT_GPIO)if (ath5k_get_bus_type(ah) == ATH_AHB)break ;while (ath5k_hw_is_intr_pending(ah) && --counter > 0 );/* * Until we handle rx / tx interrupts mask them on IMR * * NOTE : ah - > ( rx / tx ) _ pending are set when scheduling the tasklets * and unset after we ' ve handled the interrupts . if (ah->rx_pending || ah->tx_pending)if (unlikely(!counter))"too many interrupts, giving up for now\n" );/* Fire up calibration poll */ return IRQ_HANDLED;/* * Periodically recalibrate the PHY to account * for temperature / environment changes . static void struct work_struct *work)struct ath5k_hw *ah = container_of(work, struct ath5k_hw,/* Should we run a full calibration ? */ if (time_is_before_eq_jiffies(ah->ah_cal_next_full)) {"running full calibration\n" );if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) {/* * Rfgain is out of bounds , reset the chip * to load new gain values . "got new rfgain, resetting\n" );else "channel %u/%x\n" ,if (ath5k_hw_phy_calibrate(ah, ah->curchan))"calibration of channel %u failed\n" ,/* Clear calibration flags */ if (ah->ah_cal_mask & AR5K_CALIBRATION_FULL)else if (ah->ah_cal_mask & AR5K_CALIBRATION_SHORT)static void struct tasklet_struct *t)struct ath5k_hw *ah = from_tasklet(ah, t, ani_tasklet);static void struct work_struct *work)struct ath5k_hw *ah = container_of(work, struct ath5k_hw,struct ath5k_txq *txq;int i;bool needreset = false ;if (!test_bit(ATH_STAT_STARTED, ah->status))return ;for (i = 0 ; i < ARRAY_SIZE(ah->txqs); i++) {if (ah->txqs[i].setup) {if (txq->txq_len > 1 ) {if (txq->txq_poll_mark) {"TX queue stuck %d\n" ,true ;break ;else {true ;if (needreset) {"TX queues stuck, resetting\n" );true );/*************************\* Initialization routines * static const struct ieee80211_iface_limit if_limits[] = {2048 , .types = BIT(NL80211_IFTYPE_STATION) },4 , .types =#ifdef CONFIG_MAC80211_MESH#endif static const struct ieee80211_iface_combination if_comb = {2048 ,1 ,int struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops)struct ieee80211_hw *hw = ah->hw;struct ath_common *common;int ret;int csz;/* Initialize driver private data */ 1 ;/* SW support for IBSS_RSN is provided by mac80211 */ /* both antennas can be configured as RX or TX */ 0 x3;0 x3;2 ;/* * Mark the device as detached to avoid processing * interrupts until setup is complete . 1000 ;/* Setup interrupt handler */ "ath" , ah);if (ret) {"request_irq failed\n" );goto err;40 ;/* * Cache line size is used to size and align various * structures used to communicate with the hardware . 2 ; /* convert to bytes */ /* Initialize device */ if (ret)goto err_irq;/* Set up multi-rate retry capabilities */ if (ah->ah_capabilities.cap_has_mrr_support) {4 ;sizeof (struct ath5k_vif);/* Finish private driver data initialization */ if (ret)goto err_ah;"Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n" ,if (!ah->ah_single_chip) {/* Single chip radio (!RF5111) */ if (ah->ah_radio_5ghz_revision &&/* No 5GHz support -> report 2GHz radio */ if (!test_bit(AR5K_MODE_11A,"RF%s 2GHz radio found (0x%x)\n" ,/* No 2GHz support (5110 and some else if (!test_bit(AR5K_MODE_11B,"RF%s 5GHz radio found (0x%x)\n" ,/* Multiband radio */ else {"RF%s multiband radio found" " (0x%x)\n" ,/* Multi chip radio (RF5111 - RF2111) -> else if (ah->ah_radio_5ghz_revision &&"RF%s 5GHz radio found (0x%x)\n" ,"RF%s 2GHz radio found (0x%x)\n" ,/* ready to process interrupts */ return 0 ;return ret;static int struct ath5k_hw *ah)"invalid %u\n" ,/* * Shutdown the hardware and driver : * stop output from above * disable interrupts * turn off timers * turn off the radio * clear transmit machinery * clear receive machinery * drain and release tx queues * reclaim beacon resources * power down hardware * * Note that some of this work is not possible if the * hardware is gone ( invalid ) . if (!test_bit(ATH_STAT_INVALID, ah->status)) {0 );return 0 ;int ath5k_start(struct ieee80211_hw *hw)struct ath5k_hw *ah = hw->priv;struct ath_common *common = ath5k_hw_common(ah);int ret, i;"mode %d\n" , ah->opmode);/* * Stop anything previously setup . This is safe * no matter this is the first time through or not . /* * The basic interface to setting the hardware in a good * state is ` ` reset ' ' . On return the hardware is known to * be powered up and with interrupts disabled . This must * be followed by initialization of the appropriate bits * and then setup of the interrupt mask . false );if (ret)goto done;if (!ath5k_modparam_no_hw_rfkill_switch)/* * Reset the key cache since some parts do not reset the * contents on initial power up or resume from suspend . for (i = 0 ; i < common->keymax; i++)/* Use higher rates for acks instead of base true ;for (i = 0 ; i < ARRAY_SIZE(ah->bslot); i++)0 ;return ret;static void ath5k_stop_tasklets(struct ath5k_hw *ah)false ;false ;/* * Stop the device , grabbing the top - level lock to protect * against concurrent entry through ath5k_init ( which can happen * if another thread does a system call and the thread doing the * stop is preempted ) . void ath5k_stop(struct ieee80211_hw *hw, bool suspend)struct ath5k_hw *ah = hw->priv;int ret;if (ret == 0 && !test_bit(ATH_STAT_INVALID, ah->status)) {/* * Don ' t set the card in full sleep mode ! * * a ) When the device is in this state it must be carefully * woken up or references to registers in the PCI clock * domain may freeze the bus ( and system ) . This varies * by chip and is mostly an issue with newer parts * ( madwifi sources mentioned srev > = 0 x78 ) that go to * sleep more quickly . * * b ) On older chips full sleep results a weird behaviour * during wakeup . I tested various cards with srev < 0 x78 * and they don ' t wake up after module reload , a second * module reload is needed to bring the card up again . * * Until we figure out what ' s going on don ' t enable * full chip reset on any chip ( this is what Legacy HAL * and Sam ' s HAL do anyway ) . Instead Perform a full reset * on the device ( same as initial state after attach ) and "putting device to sleep\n" );if (!ath5k_modparam_no_hw_rfkill_switch)/* * Reset the hardware . If chan is not NULL , then also pause rx / tx * and change to the given channel . * * This should be called with ah - > lock . static int struct ath5k_hw *ah, struct ieee80211_channel *chan,bool skip_pcu)struct ath_common *common = ath5k_hw_common(ah);int ret, ani_mode;bool fast = chan && modparam_fastchanswitch ? 1 : 0 ;"resetting\n" );0 );/* Save ani mode and disable ANI during * reset . If we don ' t we might get false /* We are going to empty hw queues * so we should also free any remaining /* Stop PCU */ /* Stop DMA * * Note : If DMA didn ' t stop continue * since only a reset will fix it . /* RF Bus grant won't work if we have pending * frames if (ret && fast) {"DMA didn't stop, falling back to normal reset\n" );false ;if (chan)if (ret) {"can't reset hardware (%d)\n" , ret);goto err;if (ret) {"can't start recv logic\n" );goto err;/* * Set calibration intervals * * Note : We don ' t need to run calibration imediately * since some initial calibration is done on reset * even for fast channel switching . Also on scanning * this will get set again and again and it won ' t get * executed unless we connect somewhere and spend some * time on the channel ( that ' s what calibration needs * anyway to be accurate ) . /* clear survey data and cycle counters */ 0 , sizeof (ah->survey));0 , sizeof (common->cc_survey));0 , sizeof (common->cc_ani));/* * Change channels and update the h / w rate map if we ' re switching ; * e . g . 11 a to 11 b / g . * * We may be doing a reset in response to an ioctl that changes the * channel so update any state that might change as a result . * * XXX needed ? /* ath5k_chan_change(ah, c); */ /* intrs are enabled by ath5k_beacon_config */ return 0 ;return ret;static void ath5k_reset_work(struct work_struct *work)struct ath5k_hw *ah = container_of(work, struct ath5k_hw,true );static int struct ieee80211_hw *hw)struct ath5k_hw *ah = hw->priv;struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);struct ath5k_txq *txq;int ret;/* * Collect the channel list . The 802 . 11 layer * is responsible for filtering this list based * on settings like the phy mode and regulatory * domain restrictions . if (ret) {"can't get channels\n" );goto err;/* * Allocate tx + rx descriptors and populate the lists . if (ret) {"can't allocate descriptors\n" );goto err;/* * Allocate hardware transmit queues : one queue for * beacon frames and one data queue for each QoS * priority . Note that hw functions handle resetting * these queues at the needed time . if (ret < 0 ) {"can't setup a beacon xmit queue\n" );goto err_desc;0 );if (IS_ERR(ah->cabq)) {"can't setup cab queue\n" );goto err_bhal;/* 5211 and 5212 usually support 10 queues but we better rely on the if (ah->ah_capabilities.cap_queues.q_tx_num >= 6 ) {/* This order matches mac80211's queue priority, so we can if (IS_ERR(txq)) {"can't setup xmit queue\n" );goto err_queues;if (IS_ERR(txq)) {"can't setup xmit queue\n" );goto err_queues;if (IS_ERR(txq)) {"can't setup xmit queue\n" );goto err_queues;if (IS_ERR(txq)) {"can't setup xmit queue\n" );goto err_queues;4 ;else {/* older hardware (5210) can only support one data queue */ if (IS_ERR(txq)) {"can't setup xmit queue\n" );goto err_queues;1 ;if (ret) {"unable to read address from EEPROM\n" );goto err_queues;/* All MAC address bits matter for ACKs */ if (ret) {"can't initialize regulatory system\n" );goto err_queues;if (ret) {"can't register ieee80211 hw\n" );goto err_queues;if (!ath_is_world_regd(regulatory))return 0 ;return ret;void struct ath5k_hw *ah)struct ieee80211_hw *hw = ah->hw;/* * NB : the order of these is important : * o call the 802 . 11 layer before detaching ath5k_hw to * ensure callbacks into the driver to delete global * key cache entries can be handled * o reclaim the tx queue data structures after calling * the 802 . 11 layer as we ' ll get called back to reclaim * node state and potentially want to use them * o to cleanup the tx queues the hal is called , so detach * it last * XXX : ? ? ? detach ath5k_hw ? ? ? * Other than that , it ' s straightforward . . . /* * NB : can ' t reclaim these until after ieee80211_ifdetach * returns because we ' ll get called back to reclaim node * state and potentially want to use them . bool struct ath5k_hw *ah)struct ath5k_vif_iter_data iter_data;false ;false ;true ;return iter_data.any_assoc;void struct ieee80211_hw *hw, bool enable)struct ath5k_hw *ah = hw->priv;if (enable)else void _ath5k_printk(const struct ath5k_hw *ah, const char *level,const char *fmt, ...)struct va_format vaf;if (ah && ah->hw)"%s" pr_fmt("%s: %pV" ),else "%s" pr_fmt("%pV" ), level, &vaf);
Messung V0.5 in Prozent C=95 H=89 G=91
¤ Dauer der Verarbeitung: 0.103 Sekunden
(vorverarbeitet am 2026-10-02)
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