// SPDX-License-Identifier: GPL-2.0 /* Common Flash Interface probe code . ( C ) 2000 Red Hat . See JEDEC ( http : //www.jedec.org/) standard JESD21C (section 3.5) for the standard this probe goes back to . Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com #include <linux/module.h>#include <linux/init.h>#include <linux/types.h>#include <linux/kernel.h>#include <asm /io.h>#include <asm /byteorder.h>#include <linux/errno.h>#include <linux/slab.h>#include <linux/interrupt.h>#include <linux/mtd/mtd.h>#include <linux/mtd/map.h>#include <linux/mtd/cfi.h>#include <linux/mtd/gen_probe.h>/* AMD */ #define AM29DL800BB 0 x22CB#define AM29DL800BT 0 x224A#define AM29F800BB 0 x2258#define AM29F800BT 0 x22D6#define AM29LV400BB 0 x22BA#define AM29LV400BT 0 x22B9#define AM29LV800BB 0 x225B#define AM29LV800BT 0 x22DA#define AM29LV160DT 0 x22C4#define AM29LV160DB 0 x2249#define AM29F017D 0 x003D#define AM29F016D 0 x00AD#define AM29F080 0 x00D5#define AM29F040 0 x00A4#define AM29LV040B 0 x004F#define AM29F032B 0 x0041#define AM29F002T 0 x00B0#define AM29SL800DB 0 x226B#define AM29SL800DT 0 x22EA/* Atmel */ #define AT49BV512 0 x0003#define AT29LV512 0 x003d#define AT49BV16X 0 x00C0#define AT49BV16XT 0 x00C2#define AT49BV32X 0 x00C8#define AT49BV32XT 0 x00C9/* Eon */ #define EN29LV400AT 0 x22B9#define EN29LV400AB 0 x22BA#define EN29SL800BB 0 x226B#define EN29SL800BT 0 x22EA/* Fujitsu */ #define MBM29F040C 0 x00A4#define MBM29F800BA 0 x2258#define MBM29LV650UE 0 x22D7#define MBM29LV320TE 0 x22F6#define MBM29LV320BE 0 x22F9#define MBM29LV160TE 0 x22C4#define MBM29LV160BE 0 x2249#define MBM29LV800BA 0 x225B#define MBM29LV800TA 0 x22DA#define MBM29LV400TC 0 x22B9#define MBM29LV400BC 0 x22BA/* Hyundai */ #define HY29F002T 0 x00B0/* Intel */ #define I28F004B3T 0 x00d4#define I28F004B3B 0 x00d5#define I28F400B3T 0 x8894#define I28F400B3B 0 x8895#define I28F008S5 0 x00a6#define I28F016S5 0 x00a0#define I28F008SA 0 x00a2#define I28F008B3T 0 x00d2#define I28F008B3B 0 x00d3#define I28F800B3T 0 x8892#define I28F800B3B 0 x8893#define I28F016S3 0 x00aa#define I28F016B3T 0 x00d0#define I28F016B3B 0 x00d1#define I28F160B3T 0 x8890#define I28F160B3B 0 x8891#define I28F320B3T 0 x8896#define I28F320B3B 0 x8897#define I28F640B3T 0 x8898#define I28F640B3B 0 x8899#define I28F640C3B 0 x88CD#define I28F160F3T 0 x88F3#define I28F160F3B 0 x88F4#define I28F160C3T 0 x88C2#define I28F160C3B 0 x88C3#define I82802AB 0 x00ad#define I82802AC 0 x00ac/* Macronix */ #define MX29LV040C 0 x004F#define MX29LV160T 0 x22C4#define MX29LV160B 0 x2249#define MX29F040 0 x00A4#define MX29F016 0 x00AD#define MX29F002T 0 x00B0#define MX29F004T 0 x0045#define MX29F004B 0 x0046/* NEC */ #define UPD29F064115 0 x221C/* PMC */ #define PM49FL002 0 x006D#define PM49FL004 0 x006E#define PM49FL008 0 x006A/* Sharp */ #define LH28F640BF 0 x00B0/* ST - www.st.com */ #define M29F800AB 0 x0058#define M29W800DT 0 x22D7#define M29W800DB 0 x225B#define M29W400DT 0 x00EE#define M29W400DB 0 x00EF#define M29W160DT 0 x22C4#define M29W160DB 0 x2249#define M29W040B 0 x00E3#define M50FW040 0 x002C#define M50FW080 0 x002D#define M50FW016 0 x002E#define M50LPW080 0 x002F#define M50FLW080A 0 x0080#define M50FLW080B 0 x0081#define PSD4256G6V 0 x00e9/* SST */ #define SST29EE020 0 x0010#define SST29LE020 0 x0012#define SST29EE512 0 x005d#define SST29LE512 0 x003d#define SST39LF800 0 x2781#define SST39LF160 0 x2782#define SST39VF1601 0 x234b#define SST39VF3201 0 x235b#define SST39WF1601 0 x274b#define SST39WF1602 0 x274a#define SST39LF512 0 x00D4#define SST39LF010 0 x00D5#define SST39LF020 0 x00D6#define SST39LF040 0 x00D7#define SST39SF010A 0 x00B5#define SST39SF020A 0 x00B6#define SST39SF040 0 x00B7#define SST49LF004B 0 x0060#define SST49LF040B 0 x0050#define SST49LF008A 0 x005a#define SST49LF030A 0 x001C#define SST49LF040A 0 x0051#define SST49LF080A 0 x005B#define SST36VF3203 0 x7354/* Toshiba */ #define TC58FVT160 0 x00C2#define TC58FVB160 0 x0043#define TC58FVT321 0 x009A#define TC58FVB321 0 x009C#define TC58FVT641 0 x0093#define TC58FVB641 0 x0095/* Winbond */ #define W49V002A 0 x00b0/* * Unlock address sets for AMD command sets . * Intel command sets use the MTD_UADDR_UNNECESSARY . * Each identifier , except MTD_UADDR_UNNECESSARY , and * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs [ ] . * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure * initialization need not require initializing all of the * unlock addresses for all bit widths . enum uaddr {0 , /* data width not supported */ /* Requires an arbitrary address */ /* Does not require any address */ struct unlock_addr {/* * I don ' t like the fact that the first entry in unlock_addrs [ ] * exists , but is for MTD_UADDR_NOT_SUPPORTED - and , therefore , * should not be used . The problem is that structures with * initializers have extra fields initialized to 0 . It is _ very_ * desirable to have the unlock address entries for unsupported * data widths automatically initialized - that means that * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here * must go unused . static const struct unlock_addr unlock_addrs[] = {0 xffff,0 xffff0 x0555,0 x02aa0 x0555,0 x0aaa0 x5555,0 x2aaa0 x0AAA,0 x05540 x0AAA,0 x05550 xaaaa,0 x55550 x0000, /* Doesn't matter which address */ 0 x0000 /* is used - must be last entry */ 0 x0000,0 x0000struct amd_flash_info {const char *name;const uint16_t mfr_id;const uint16_t dev_id;const uint8_t dev_size;const uint8_t nr_regions;const uint16_t cmd_set;const uint32_t regions[6 ];const uint8_t devtypes; /* Bitmask for x8, x16 etc. */ const uint8_t uaddr; /* unlock addrs for 8, 16, 32, 64 */ #define ERASEINFO(size,blocks) (size<<8 )|(blocks-1 )#define SIZE_64KiB 16 #define SIZE_128KiB 17 #define SIZE_256KiB 18 #define SIZE_512KiB 19 #define SIZE_1MiB 20 #define SIZE_2MiB 21 #define SIZE_4MiB 22 #define SIZE_8MiB 23 /* * Please keep this list ordered by manufacturer ! * Fortunately , the list isn ' t searched often and so a * slow , linear search isn ' t so bad . static const struct amd_flash_info jedec_table[] = {"AMD AM29F032B" ,1 ,0 x10000,64 )"AMD AM29LV160DT" ,4 ,0 x10000,31 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"AMD AM29LV160DB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,31 )"AMD AM29LV400BB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,7 )"AMD AM29LV400BT" ,4 ,0 x10000,7 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"AMD AM29LV800BB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,15 ),/* add DL */ "AMD AM29DL800BB" ,6 ,0 x04000,1 ),0 x08000,1 ),0 x02000,4 ),0 x08000,1 ),0 x04000,1 ),0 x10000,14 )"AMD AM29DL800BT" ,6 ,0 x10000,14 ),0 x04000,1 ),0 x08000,1 ),0 x02000,4 ),0 x08000,1 ),0 x04000,1 )"AMD AM29F800BB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,15 ),"AMD AM29LV800BT" ,4 ,0 x10000,15 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"AMD AM29F800BT" ,4 ,0 x10000,15 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"AMD AM29F017D" ,1 ,0 x10000,32 ),"AMD AM29F016D" ,1 ,0 x10000,32 ),"AMD AM29F080" ,1 ,0 x10000,16 ),"AMD AM29F040" ,1 ,0 x10000,8 ),"AMD AM29LV040B" ,1 ,0 x10000,8 ),"AMD AM29F002T" ,4 ,0 x10000,3 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 ),"AMD AM29SL800DT" ,4 ,0 x10000,15 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 ),"AMD AM29SL800DB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,15 ),"Atmel AT49BV512" ,1 ,0 x10000,1 )"Atmel AT29LV512" ,1 ,0 x80,256 ),0 x80,256 )"Atmel AT49BV16X" ,/* ???? */ 2 ,0 x02000,8 ),0 x10000,31 )"Atmel AT49BV16XT" ,/* ???? */ 2 ,0 x10000,31 ),0 x02000,8 )"Atmel AT49BV32X" ,/* ???? */ 2 ,0 x02000,8 ),0 x10000,63 )"Atmel AT49BV32XT" ,/* ???? */ 2 ,0 x10000,63 ),0 x02000,8 )"Eon EN29LV400AT" ,4 ,0 x10000,7 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 ),"Eon EN29LV400AB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,7 ),"Eon EN29SL800BT" ,4 ,0 x10000,15 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 ),"Eon EN29SL800BB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,15 ),"Fujitsu MBM29F040C" ,1 ,0 x10000,8 )"Fujitsu MBM29F800BA" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,15 ),"Fujitsu MBM29LV650UE" ,1 ,0 x10000,128 )"Fujitsu MBM29LV320TE" ,2 ,0 x10000,63 ),0 x02000,8 )"Fujitsu MBM29LV320BE" ,2 ,0 x02000,8 ),0 x10000,63 )"Fujitsu MBM29LV160TE" ,4 ,0 x10000,31 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"Fujitsu MBM29LV160BE" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,31 )"Fujitsu MBM29LV800BA" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,15 )"Fujitsu MBM29LV800TA" ,4 ,0 x10000,15 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"Fujitsu MBM29LV400BC" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,7 )"Fujitsu MBM29LV400TC" ,4 ,0 x10000,7 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"Hyundai HY29F002T" ,4 ,0 x10000,3 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 ),"Intel 28F004B3B" ,2 ,0 x02000, 8 ),0 x10000, 7 ),"Intel 28F004B3T" ,2 ,0 x10000, 7 ),0 x02000, 8 ),"Intel 28F400B3B" ,2 ,0 x02000, 8 ),0 x10000, 7 ),"Intel 28F400B3T" ,2 ,0 x10000, 7 ),0 x02000, 8 ),"Intel 28F008B3B" ,2 ,0 x02000, 8 ),0 x10000, 15 ),"Intel 28F008B3T" ,2 ,0 x10000, 15 ),0 x02000, 8 ),"Intel 28F008S5" ,1 ,0 x10000,16 ),"Intel 28F016S5" ,1 ,0 x10000,32 ),"Intel 28F008SA" ,1 ,0 x10000, 16 ),"Intel 28F800B3B" ,2 ,0 x02000, 8 ),0 x10000, 15 ),"Intel 28F800B3T" ,2 ,0 x10000, 15 ),0 x02000, 8 ),"Intel 28F016B3B" ,2 ,0 x02000, 8 ),0 x10000, 31 ),"Intel I28F016S3" ,1 ,0 x10000, 32 ),"Intel 28F016B3T" ,2 ,0 x10000, 31 ),0 x02000, 8 ),"Intel 28F160B3B" ,2 ,0 x02000, 8 ),0 x10000, 31 ),"Intel 28F160B3T" ,2 ,0 x10000, 31 ),0 x02000, 8 ),"Intel 28F320B3B" ,2 ,0 x02000, 8 ),0 x10000, 63 ),"Intel 28F320B3T" ,2 ,0 x10000, 63 ),0 x02000, 8 ),"Intel 28F640B3B" ,2 ,0 x02000, 8 ),0 x10000, 127 ),"Intel 28F640B3T" ,2 ,0 x10000, 127 ),0 x02000, 8 ),"Intel 28F640C3B" ,2 ,0 x02000, 8 ),0 x10000, 127 ),"Intel 82802AB" ,1 ,0 x10000,8 ),"Intel 82802AC" ,1 ,0 x10000,16 ),"Macronix MX29LV040C" ,1 ,0 x10000,8 ),"MXIC MX29LV160T" ,4 ,0 x10000,31 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"NEC uPD29F064115" ,3 ,0 x2000,8 ),0 x10000,126 ),0 x2000,8 ),"MXIC MX29LV160B" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,31 )"Macronix MX29F040" ,1 ,0 x10000,8 ),"Macronix MX29F016" ,1 ,0 x10000,32 ),"Macronix MX29F004T" ,4 ,0 x10000,7 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 ),"Macronix MX29F004B" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,7 ),"Macronix MX29F002T" ,4 ,0 x10000,3 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 ),"PMC Pm49FL002" ,1 ,0 x01000, 64 )"PMC Pm49FL004" ,1 ,0 x01000, 128 )"PMC Pm49FL008" ,1 ,0 x01000, 256 )"LH28F640BF" ,2 ,0 x10000, 127 ),0 x02000, 8 ),"SST 39LF512" ,1 ,0 x01000,16 ),"SST 39LF010" ,1 ,0 x01000,32 ),"SST 29EE020" ,1 ,0 x01000,64 ),"SST 29LE020" ,1 ,0 x01000,64 ),"SST 39LF020" ,1 ,0 x01000,64 ),"SST 39LF040" ,1 ,0 x01000,128 ),"SST 39SF010A" ,1 ,0 x01000,32 ),"SST 39SF020A" ,1 ,0 x01000,64 ),"SST 39SF040" ,1 ,0 x01000,128 ),"SST 49LF040B" ,1 ,0 x01000,128 ),"SST 49LF004B" ,1 ,0 x01000,128 ),"SST 49LF008A" ,1 ,0 x01000,256 ),"SST 49LF030A" ,1 ,0 x01000,96 ),"SST 49LF040A" ,1 ,0 x01000,128 ),"SST 49LF080A" ,1 ,0 x01000,256 ),/* should be CFI */ "SST 39LF160" ,2 ,0 x1000,256 ),0 x1000,256 )/* should be CFI */ "SST 39VF1601" ,2 ,0 x1000,256 ),0 x1000,256 )/* CFI is broken: reports AMD_STD, but needs custom uaddr */ "SST 39WF1601" ,2 ,0 x1000,256 ),0 x1000,256 )/* CFI is broken: reports AMD_STD, but needs custom uaddr */ "SST 39WF1602" ,2 ,0 x1000,256 ),0 x1000,256 )/* should be CFI */ "SST 39VF3201" ,4 ,0 x1000,256 ),0 x1000,256 ),0 x1000,256 ),0 x1000,256 )"SST 36VF3203" ,1 ,0 x10000,64 ),"ST M29F800AB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,15 ),/* FIXME - CFI device? */ "ST M29W800DT" ,4 ,0 x10000,15 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )/* FIXME - CFI device? */ "ST M29W800DB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,15 )"ST M29W400DT" ,4 ,0 x04000,7 ),0 x02000,1 ),0 x08000,2 ),0 x10000,1 )"ST M29W400DB" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,7 )/* FIXME - CFI device? */ "ST M29W160DT" ,/* ???? */ 4 ,0 x10000,31 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )/* FIXME - CFI device? */ "ST M29W160DB" ,/* ???? */ 4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,31 )"ST M29W040B" ,1 ,0 x10000,8 ),"ST M50FW040" ,1 ,0 x10000,8 ),"ST M50FW080" ,1 ,0 x10000,16 ),"ST M50FW016" ,1 ,0 x10000,32 ),"ST M50LPW080" ,1 ,0 x10000,16 ),"ST M50FLW080A" ,4 ,0 x1000,16 ),0 x10000,13 ),0 x1000,16 ),0 x1000,16 ),"ST M50FLW080B" ,4 ,0 x1000,16 ),0 x1000,16 ),0 x10000,13 ),0 x1000,16 ),0 xff00 | CFI_MFR_ST,0 xff00 | PSD4256G6V,"ST PSD4256G6V" ,1 ,0 x10000,16 ),"Toshiba TC58FVT160" ,4 ,0 x10000,31 ),0 x08000,1 ),0 x02000,2 ),0 x04000,1 )"Toshiba TC58FVB160" ,4 ,0 x04000,1 ),0 x02000,2 ),0 x08000,1 ),0 x10000,31 )"Toshiba TC58FVB321" ,2 ,0 x02000,8 ),0 x10000,63 )"Toshiba TC58FVT321" ,2 ,0 x10000,63 ),0 x02000,8 )"Toshiba TC58FVB641" ,2 ,0 x02000,8 ),0 x10000,127 )"Toshiba TC58FVT641" ,2 ,0 x10000,127 ),0 x02000,8 )"Winbond W49V002A" ,4 ,0 x10000, 3 ),0 x08000, 1 ),0 x02000, 2 ),0 x04000, 1 ),static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,struct cfi_private *cfi)unsigned long mask;int bank = 0 ;/* According to JEDEC "Standard Manufacturer's Identification Code" * ( http : //www.jedec.org/download/search/jep106W.pdf) * several first banks can contain 0 x7f instead of actual ID do {0 + (bank << 8 ), map, cfi);1 << (cfi->device_type * 8 )) - 1 ;if (ofs >= map->size)return 0 ;while ((result.x[0 ] & mask) == CFI_MFR_CONTINUATION);return result.x[0 ] & mask;static inline u32 jedec_read_id(struct map_info *map, uint32_t base,struct cfi_private *cfi)unsigned long mask;1 , map, cfi);1 << (cfi->device_type * 8 )) -1 ;return result.x[0 ] & mask;static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi)/* Reset */ /* after checking the datasheets for SST, MACRONIX and ATMEL * ( oh and incidentaly the jedec spec - 3 . 5 . 3 . 3 ) the reset * sequence is * supposed * to be 0 xaa at 0 x5555 , 0 x55 at * 0 x2aaa , 0 xF0 at 0 x5555 this will not affect the AMD chips * as they will ignore the writes and don ' t care what address if (cfi->addr_unlock1) {"reset unlock called %x %x \n" ,0 xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);0 x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);0 xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);/* Some misdesigned Intel chips do not respond for 0xF0 for a reset, * so ensure we ' re in read mode . Send both the Intel and the AMD command * for this . Intel uses 0 xff for this , AMD uses 0 xff for NOP , so * this should be safe . 0 xFF, 0 , base, map, cfi, cfi->device_type, NULL);/* FIXME - should have reset delay before continuing */ static int cfi_jedec_setup(struct map_info *map, struct cfi_private *cfi, int index)int i,num_erase_regions;if (!(jedec_table[index].devtypes & cfi->device_type)) {"Rejecting potential %s with incompatible %d-bit device type\n" ,4 * (1 <<cfi->device_type));return 0 ;"Found: %s\n" ,jedec_table[index].name);sizeof (struct cfi_ident) + num_erase_regions * 4 , GFP_KERNEL);if (!cfi->cfiq) {//xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name); return 0 ;0 , sizeof (struct cfi_ident));0 x30);for (i=0 ; i<num_erase_regions; i++){/* This may be redundant for some cases, but it doesn't hurt */ /* The table has unlock addresses in _bytes_, and we try not to let our brains explode when we see the datasheets talking about address lines numbered from A - 1 to A18 . The CFI table has unlock addresses return 1 ; /* ok */ /* * There is a BIG problem properly ID ' ing the JEDEC device and guaranteeing * the mapped address , unlock addresses , and proper chip ID . This function * attempts to minimize errors . It is doubtfull that this probe will ever * be perfect - consequently there should be some module parameters that * could be manually specified to force the chip info . static inline int jedec_match( uint32_t base,struct map_info *map,struct cfi_private *cfi,const struct amd_flash_info *finfo )int rc = 0 ; /* failure until all tests pass */ /* * The IDs must match . For X16 and X32 devices operating in * a lower width ( X8 or X16 ) , the device ID ' s are usually just * the lower byte ( s ) of the larger device ID for wider mode . If * a part is found that doesn ' t fit this assumption ( device id for * smaller width mode is completely unrealated to full - width mode ) * then the jedec_table [ ] will have to be augmented with the IDs * for different widths . switch (cfi->device_type) {case CFI_DEVICETYPE_X8:/* bjd: it seems that if we do this, we can end up * detecting 16 bit flashes as an 8 bit device , even though * there aren ' t . if (finfo->dev_id > 0 xff) {"%s(): ID is not 8bit\n" ,goto match_done;break ;case CFI_DEVICETYPE_X16:break ;case CFI_DEVICETYPE_X32:break ;default :"MTD %s(): Unsupported device type %d\n" ,goto match_done;if ( cfi->mfr != mfr || cfi->id != id ) {goto match_done;/* the part size must fit in the memory window */ "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n" ,1 << finfo->dev_size, base + (1 << finfo->dev_size) );if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) {"MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n" ,1 << finfo->dev_size );goto match_done;if (! (finfo->devtypes & cfi->device_type))goto match_done;"MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n" ,if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr"MTD %s(): 0x%.4x 0x%.4x did not match\n" ,goto match_done;/* * Make sure the ID ' s disappear when the device is taken out of * ID mode . The only time this should fail when it should succeed * is when the ID ' s are written as data to the same * addresses . For this rare and unfortunate case the chip * cannot be probed correctly . * FIXME - write a driver that takes all of the chip info as * module parameters , doesn ' t probe but forces a load . "MTD %s(): check ID's disappear when not in ID mode\n" ,if ( mfr == cfi->mfr && id == cfi->id ) {"MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n" "You might need to manually specify JEDEC parameters.\n" ,goto match_done;/* all tests passed - mark as success */ 1 ;/* * Put the device back in ID mode - only need to do this if we * were truly frobbing a real device . "MTD %s(): return to ID mode\n" , __func__ );if (cfi->addr_unlock1) {0 xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);0 x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);0 x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);/* FIXME - should have a delay before continuing */ return rc;static int jedec_probe_chip(struct map_info *map, __u32 base,unsigned long *chip_map, struct cfi_private *cfi)int i;enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED;if (!cfi->numchips) {if (MTD_UADDR_UNNECESSARY == uaddr_idx)return 0 ;/* Make certain we aren't probing past the end of map */ if (base >= map->size) {"Probe at base(0x%08x) past the end of the map(0x%08lx)\n" ,1 );return 0 ;/* Ensure the unlock addresses we try stay inside the map */ if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) ||goto retry;/* Reset */ /* Autoselect Mode */ if (cfi->addr_unlock1) {0 xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);0 x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);0 x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);/* FIXME - should have a delay before continuing */ if (!cfi->numchips) {/* This is the first time we're called. Set up the CFI "Search for id:(%02x %02x) interleave(%d) type(%d)\n" ,for (i = 0 ; i < ARRAY_SIZE(jedec_table); i++) {if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {"MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n" ,if (!cfi_jedec_setup(map, cfi, i))return 0 ;goto ok_out;goto retry;else {/* Make sure it is a chip of the same manufacturer and id */ if ((mfr != cfi->mfr) || (id != cfi->id)) {"%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n" ,return 0 ;/* Check each previous chip locations to see if it's an alias */ for (i=0 ; i < (base >> cfi->chipshift); i++) {unsigned long start;if (!test_bit(i, chip_map)) {continue ; /* Skip location; no valid chip at this address */ if (jedec_read_mfr(map, start, cfi) == cfi->mfr &&/* Eep. This chip also looks like it's in autoselect mode. /* If the device IDs go away, it's an alias */ if (jedec_read_mfr(map, base, cfi) != cfi->mfr ||"%s: Found an alias at 0x%x for the chip at 0x%lx\n" ,return 0 ;/* Yes, it's actually got the device IDs as data. Most * unfortunate . Stick the new chip in read mode /* FIXME: Use other modes to do a proper check */ if (jedec_read_mfr(map, base, cfi) == cfi->mfr &&"%s: Found an alias at 0x%x for the chip at 0x%lx\n" ,return 0 ;/* OK, if we got to here, then none of the previous chips appear to /* Update chip map */ /* Put it back into Read Mode */ "%s: Found %d x%d devices at 0x%x in %d-bit bank\n" ,8 , base,8 );return 1 ;static struct chip_probe jedec_chip_probe = {"JEDEC" ,static struct mtd_info *jedec_probe(struct map_info *map)/* * Just use the generic probe stuff to call our CFI - specific * chip_probe routine in all the possible permutations , etc . return mtd_do_chip_probe(map, &jedec_chip_probe);static struct mtd_chip_driver jedec_chipdrv = {"jedec_probe" ,static int __init jedec_probe_init(void )return 0 ;static void __exit jedec_probe_exit(void )"GPL" );"Erwin Authried <eauth@softsys.co.at> et al." );"Probe code for JEDEC-compliant flash chips" );
Messung V0.5 in Prozent C=97 H=86 G=91
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