// SPDX-License-Identifier: GPL-2.0 // Copyright (C) 2018 Intel Corporation #include <linux/acpi.h>#include <linux/clk.h>#include <linux/delay.h>#include <linux/i2c.h>#include <linux/module.h>#include <linux/pm_runtime.h>#include <linux/regulator/consumer.h>#include <media/v4l2-cci.h>#include <media/v4l2-ctrls.h>#include <media/v4l2-device.h>#include <media/v4l2-fwnode.h>#include <linux/unaligned.h>#define IMX258_REG_MODE_SELECT CCI_REG8(0 x0100)#define IMX258_MODE_STANDBY 0 x00#define IMX258_MODE_STREAMING 0 x01#define IMX258_REG_RESET CCI_REG8(0 x0103)/* Chip ID */ #define IMX258_REG_CHIP_ID CCI_REG16(0 x0016)#define IMX258_CHIP_ID 0 x0258/* V_TIMING internal */ #define IMX258_VTS_30FPS 0 x0c50#define IMX258_VTS_30FPS_2K 0 x0638#define IMX258_VTS_30FPS_VGA 0 x034c#define IMX258_VTS_MAX 65525 /* HBLANK control - read only */ #define IMX258_PPL_DEFAULT 5352 /* Exposure control */ #define IMX258_REG_EXPOSURE CCI_REG16(0 x0202)#define IMX258_EXPOSURE_OFFSET 10 #define IMX258_EXPOSURE_MIN 4 #define IMX258_EXPOSURE_STEP 1 #define IMX258_EXPOSURE_DEFAULT 0 x640#define IMX258_EXPOSURE_MAX (IMX258_VTS_MAX - IMX258_EXPOSURE_OFFSET)/* Analog gain control */ #define IMX258_REG_ANALOG_GAIN CCI_REG16(0 x0204)#define IMX258_ANA_GAIN_MIN 0 #define IMX258_ANA_GAIN_MAX 480 #define IMX258_ANA_GAIN_STEP 1 #define IMX258_ANA_GAIN_DEFAULT 0 x0/* Digital gain control */ #define IMX258_REG_GR_DIGITAL_GAIN CCI_REG16(0 x020e)#define IMX258_REG_R_DIGITAL_GAIN CCI_REG16(0 x0210)#define IMX258_REG_B_DIGITAL_GAIN CCI_REG16(0 x0212)#define IMX258_REG_GB_DIGITAL_GAIN CCI_REG16(0 x0214)#define IMX258_DGTL_GAIN_MIN 0 #define IMX258_DGTL_GAIN_MAX 4096 /* Max = 0xFFF */ #define IMX258_DGTL_GAIN_DEFAULT 1024 #define IMX258_DGTL_GAIN_STEP 1 /* HDR control */ #define IMX258_REG_HDR CCI_REG8(0 x0220)#define IMX258_HDR_ON BIT(0 )#define IMX258_REG_HDR_RATIO CCI_REG8(0 x0222)#define IMX258_HDR_RATIO_MIN 0 #define IMX258_HDR_RATIO_MAX 5 #define IMX258_HDR_RATIO_STEP 1 #define IMX258_HDR_RATIO_DEFAULT 0 x0/* Test Pattern Control */ #define IMX258_REG_TEST_PATTERN CCI_REG16(0 x0600)#define IMX258_CLK_BLANK_STOP CCI_REG8(0 x4040)/* Orientation */ #define REG_MIRROR_FLIP_CONTROL CCI_REG8(0 x0101)#define REG_CONFIG_MIRROR_HFLIP 0 x01#define REG_CONFIG_MIRROR_VFLIP 0 x02/* IMX258 native and active pixel array size. */ #define IMX258_NATIVE_WIDTH 4224 U#define IMX258_NATIVE_HEIGHT 3192 U#define IMX258_PIXEL_ARRAY_LEFT 8 U#define IMX258_PIXEL_ARRAY_TOP 16 U#define IMX258_PIXEL_ARRAY_WIDTH 4208 U#define IMX258_PIXEL_ARRAY_HEIGHT 3120 U/* regs */ #define IMX258_REG_PLL_MULT_DRIV CCI_REG8(0 x0310)#define IMX258_REG_IVTPXCK_DIV CCI_REG8(0 x0301)#define IMX258_REG_IVTSYCK_DIV CCI_REG8(0 x0303)#define IMX258_REG_PREPLLCK_VT_DIV CCI_REG8(0 x0305)#define IMX258_REG_IOPPXCK_DIV CCI_REG8(0 x0309)#define IMX258_REG_IOPSYCK_DIV CCI_REG8(0 x030b)#define IMX258_REG_PREPLLCK_OP_DIV CCI_REG8(0 x030d)#define IMX258_REG_PHASE_PIX_OUTEN CCI_REG8(0 x3030)#define IMX258_REG_PDPIX_DATA_RATE CCI_REG8(0 x3032)#define IMX258_REG_SCALE_MODE CCI_REG8(0 x0401)#define IMX258_REG_SCALE_MODE_EXT CCI_REG8(0 x3038)#define IMX258_REG_AF_WINDOW_MODE CCI_REG8(0 x7bcd)#define IMX258_REG_FRM_LENGTH_CTL CCI_REG8(0 x0350)#define IMX258_REG_CSI_LANE_MODE CCI_REG8(0 x0114)#define IMX258_REG_X_EVN_INC CCI_REG8(0 x0381)#define IMX258_REG_X_ODD_INC CCI_REG8(0 x0383)#define IMX258_REG_Y_EVN_INC CCI_REG8(0 x0385)#define IMX258_REG_Y_ODD_INC CCI_REG8(0 x0387)#define IMX258_REG_BINNING_MODE CCI_REG8(0 x0900)#define IMX258_REG_BINNING_TYPE_V CCI_REG8(0 x0901)#define IMX258_REG_FORCE_FD_SUM CCI_REG8(0 x300d)#define IMX258_REG_DIG_CROP_X_OFFSET CCI_REG16(0 x0408)#define IMX258_REG_DIG_CROP_Y_OFFSET CCI_REG16(0 x040a)#define IMX258_REG_DIG_CROP_IMAGE_WIDTH CCI_REG16(0 x040c)#define IMX258_REG_DIG_CROP_IMAGE_HEIGHT CCI_REG16(0 x040e)#define IMX258_REG_SCALE_M CCI_REG16(0 x0404)#define IMX258_REG_X_OUT_SIZE CCI_REG16(0 x034c)#define IMX258_REG_Y_OUT_SIZE CCI_REG16(0 x034e)#define IMX258_REG_X_ADD_STA CCI_REG16(0 x0344)#define IMX258_REG_Y_ADD_STA CCI_REG16(0 x0346)#define IMX258_REG_X_ADD_END CCI_REG16(0 x0348)#define IMX258_REG_Y_ADD_END CCI_REG16(0 x034a)#define IMX258_REG_EXCK_FREQ CCI_REG16(0 x0136)#define IMX258_REG_CSI_DT_FMT CCI_REG16(0 x0112)#define IMX258_REG_LINE_LENGTH_PCK CCI_REG16(0 x0342)#define IMX258_REG_SCALE_M_EXT CCI_REG16(0 x303a)#define IMX258_REG_FRM_LENGTH_LINES CCI_REG16(0 x0340)#define IMX258_REG_FINE_INTEG_TIME CCI_REG8(0 x0200)#define IMX258_REG_PLL_IVT_MPY CCI_REG16(0 x0306)#define IMX258_REG_PLL_IOP_MPY CCI_REG16(0 x030e)#define IMX258_REG_REQ_LINK_BIT_RATE_MBPS_H CCI_REG16(0 x0820)#define IMX258_REG_REQ_LINK_BIT_RATE_MBPS_L CCI_REG16(0 x0822)struct imx258_reg_list {const struct cci_reg_sequence *regs;struct imx258_link_cfg {unsigned int lf_to_pix_rate_factor;struct imx258_reg_list reg_list;enum {/* Link frequency config */ struct imx258_link_freq_config {/* Configuration for this link frequency / num lanes selection */ struct imx258_link_cfg link_cfg[IMX258_LANE_CONFIGS];/* Mode : resolution and related config&values */ struct imx258_mode {/* Frame width */ /* Frame height */ /* V-timing */ /* Index of Link frequency config to be used */ /* Default register values */ struct imx258_reg_list reg_list;/* Analog crop rectangle */ struct v4l2_rect crop;/* * 4208x3120 @ 30 fps needs 1267Mbps/lane, 4 lanes. * To avoid further computation of clock settings, adopt the same per * lane data rate when using 2 lanes, thus allowing a maximum of 15fps. static const struct cci_reg_sequence mipi_1267mbps_19_2mhz_2l[] = {0 x1333 },10 },2 },3 },198 },10 },1 },2 },216 },0 },1 },1267 * 2 },0 },static const struct cci_reg_sequence mipi_1267mbps_19_2mhz_4l[] = {0 x1333 },5 },2 },3 },198 },10 },1 },2 },216 },0 },3 },1267 * 4 },0 },static const struct cci_reg_sequence mipi_1272mbps_24mhz_2l[] = {0 x1800 },10 },2 },4 },212 },10 },1 },2 },216 },0 },1 },1272 * 2 },0 },static const struct cci_reg_sequence mipi_1272mbps_24mhz_4l[] = {0 x1800 },5 },2 },4 },212 },10 },1 },2 },216 },0 },3 },1272 * 4 },0 },static const struct cci_reg_sequence mipi_640mbps_19_2mhz_2l[] = {0 x1333 },5 },2 },3 },100 },10 },1 },2 },216 },0 },1 },640 * 2 },0 },static const struct cci_reg_sequence mipi_640mbps_19_2mhz_4l[] = {0 x1333 },5 },2 },3 },100 },10 },1 },2 },216 },0 },3 },640 * 4 },0 },static const struct cci_reg_sequence mipi_642mbps_24mhz_2l[] = {0 x1800 },5 },2 },4 },107 },10 },1 },2 },216 },0 },1 },642 * 2 },0 },static const struct cci_reg_sequence mipi_642mbps_24mhz_4l[] = {0 x1800 },5 },2 },4 },107 },10 },1 },2 },216 },0 },3 },642 * 4 },0 },static const struct cci_reg_sequence mode_common_regs[] = {0 x3051), 0 x00 },0 x6B11), 0 xCF },0 x7FF0), 0 x08 },0 x7FF1), 0 x0F },0 x7FF2), 0 x08 },0 x7FF3), 0 x1B },0 x7FF4), 0 x23 },0 x7FF5), 0 x60 },0 x7FF6), 0 x00 },0 x7FF7), 0 x01 },0 x7FF8), 0 x00 },0 x7FF9), 0 x78 },0 x7FFA), 0 x00 },0 x7FFB), 0 x00 },0 x7FFC), 0 x00 },0 x7FFD), 0 x00 },0 x7FFE), 0 x00 },0 x7FFF), 0 x03 },0 x7F76), 0 x03 },0 x7F77), 0 xFE },0 x7FA8), 0 x03 },0 x7FA9), 0 xFE },0 x7B24), 0 x81 },0 x6564), 0 x07 },0 x6B0D), 0 x41 },0 x653D), 0 x04 },0 x6B05), 0 x8C },0 x6B06), 0 xF9 },0 x6B08), 0 x65 },0 x6B09), 0 xFC },0 x6B0A), 0 xCF },0 x6B0B), 0 xD2 },0 x6700), 0 x0E },0 x6707), 0 x0E },0 x9104), 0 x00 },0 x4648), 0 x7F },0 x7420), 0 x00 },0 x7421), 0 x1C },0 x7422), 0 x00 },0 x7423), 0 xD7 },0 x5F04), 0 x00 },0 x5F05), 0 xED },0 x0a0a},5352 },0 },0 },4207 },3119 },1 },1 },1 },1 },0 },0 },4208 },0 },16 },0 },0 },0 },256 },256 },256 },256 },0 },0 x94DC), 0 x20 },0 x94DD), 0 x20 },0 x94DE), 0 x20 },0 x95DC), 0 x20 },0 x95DD), 0 x20 },0 x95DE), 0 x20 },0 x7FB0), 0 x00 },0 x9010), 0 x3E },0 x9419), 0 x50 },0 x941B), 0 x50 },0 x9519), 0 x50 },0 x951B), 0 x50 },0 },0 },0 },static const struct cci_reg_sequence mode_4208x3120_regs[] = {0 },0 x11},0 },16 },3120 },4208 },3120 },static const struct cci_reg_sequence mode_2104_1560_regs[] = {1 },0 x12},1 },32 },1560 },2104 },1560 },static const struct cci_reg_sequence mode_1048_780_regs[] = {1 },0 x14},1 },64 },780 },1048 },780 },struct imx258_variant_cfg {const struct cci_reg_sequence *regs;unsigned int num_regs;static const struct cci_reg_sequence imx258_cfg_regs[] = {0 x3052), 0 x00 },0 x4E21), 0 x14 },0 x7B25), 0 x00 },static const struct imx258_variant_cfg imx258_cfg = {static const struct cci_reg_sequence imx258_pdaf_cfg_regs[] = {0 x3052), 0 x01 },0 x4E21), 0 x10 },0 x7B25), 0 x01 },static const struct imx258_variant_cfg imx258_pdaf_cfg = {/* * The supported formats. * This table MUST contain 4 entries per format, to cover the various flip * combinations in the order * - no flip * - h flip * - v flip * - h&v flips static const u32 codes[] = {/* 10-bit modes. */ static const char * const imx258_test_pattern_menu[] = {"Disabled" ,"Solid Colour" ,"Eight Vertical Colour Bars" ,"Colour Bars With Fade to Grey" ,"Pseudorandom Sequence (PN9)" ,/* regulator supplies */ static const char * const imx258_supply_name[] = {/* Supplies can be enabled in any order */ "vana" , /* Analog (2.8V) supply */ "vdig" , /* Digital Core (1.2V) supply */ "vif" , /* IF (1.8V) supply */ #define IMX258_NUM_SUPPLIES ARRAY_SIZE(imx258_supply_name)enum {/* * Pixel rate does not necessarily relate to link frequency on this sensor as * there is a FIFO between the pixel array pipeline and the MIPI serializer. * The recommendation from Sony is that the pixel array is always run with a * line length of 5352 pixels, which means that there is a large amount of * blanking time for the 1048x780 mode. There is no need to replicate this * blanking on the CSI2 bus, and the configuration of register 0x0301 allows the * divider to be altered. * * The actual factor between link frequency and pixel rate is in the * imx258_link_cfg, so use this to convert between the two. * bits per pixel being 10, and D-PHY being DDR is assumed by this function, so * the value is only the combination of number of lanes and pixel clock divider. static u64 link_freq_to_pixel_rate(u64 f, const struct imx258_link_cfg *link_cfg)2 * link_cfg->lf_to_pix_rate_factor;10 );return f;/* Menu items for LINK_FREQ V4L2 control */ /* Configurations for supported link frequencies */ static const s64 link_freq_menu_items_19_2[] = {633600000 ULL,320000000 ULL,static const s64 link_freq_menu_items_24[] = {636000000 ULL,321000000 ULL,#define REGS(_list) { .num_of_regs = ARRAY_SIZE(_list), .regs = _list, }/* Link frequency configs */ static const struct imx258_link_freq_config link_freq_configs_19_2[] = {2 * 2 ,4 ,2 ,4 ,static const struct imx258_link_freq_config link_freq_configs_24[] = {2 ,4 ,2 * 2 ,4 ,/* Mode configs */ static const struct imx258_mode supported_modes[] = {4208 ,3120 ,4208 ,3120 ,2104 ,1560 ,4208 ,3120 ,1048 ,780 ,4208 ,3120 ,struct imx258 {struct v4l2_subdev sd;struct media_pad pad;struct regmap *regmap;const struct imx258_variant_cfg *variant_cfg;struct v4l2_ctrl_handler ctrl_handler;/* V4L2 Controls */ struct v4l2_ctrl *link_freq;struct v4l2_ctrl *pixel_rate;struct v4l2_ctrl *vblank;struct v4l2_ctrl *hblank;struct v4l2_ctrl *exposure;struct v4l2_ctrl *hflip;struct v4l2_ctrl *vflip;/* Current mode */ const struct imx258_mode *cur_mode;unsigned long link_freq_bitmap;const struct imx258_link_freq_config *link_freq_configs;const s64 *link_freq_menu_items;unsigned int lane_mode_idx;unsigned int csi2_flags;/* * Mutex for serialized access: * Protect sensor module set pad format and start/stop streaming safely. struct mutex mutex;struct clk *clk;struct regulator_bulk_data supplies[IMX258_NUM_SUPPLIES];static inline struct imx258 *to_imx258(struct v4l2_subdev *_sd)return container_of(_sd, struct imx258, sd);/* Get bayer order based on flip setting. */ static u32 imx258_get_format_code(const struct imx258 *imx258)unsigned int i;2 : 0 ) |1 : 0 );return codes[i];/* Open sub-device */ static int imx258_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)struct imx258 *imx258 = to_imx258(sd);struct v4l2_mbus_framefmt *try_fmt =0 );struct v4l2_rect *try_crop;/* Initialize try_fmt */ 0 ].width;0 ].height;/* Initialize try_crop */ 0 );return 0 ;static int imx258_update_digital_gain(struct imx258 *imx258, u32 val)int ret = 0 ;return ret;static void imx258_adjust_exposure_range(struct imx258 *imx258)int exposure_max, exposure_def;/* Honour the VBLANK limits when setting exposure. */ static int imx258_set_ctrl(struct v4l2_ctrl *ctrl)struct imx258 *imx258 =struct imx258, ctrl_handler);struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);int ret = 0 ;/* * The VBLANK control may change the limits of usable exposure, so check * and adjust if necessary. if (ctrl->id == V4L2_CID_VBLANK)/* * Applying V4L2 control value only happens * when power is up for streaming if (pm_runtime_get_if_in_use(&client->dev) == 0 )return 0 ;switch (ctrl->id) {case V4L2_CID_ANALOGUE_GAIN:break ;case V4L2_CID_EXPOSURE:break ;case V4L2_CID_DIGITAL_GAIN:break ;case V4L2_CID_TEST_PATTERN:break ;case V4L2_CID_WIDE_DYNAMIC_RANGE:if (!ctrl->val) {else {if (ret)break ;break ;case V4L2_CID_VBLANK:break ;case V4L2_CID_VFLIP:case V4L2_CID_HFLIP:0 ) |0 ),break ;default :"ctrl(id:0x%x,val:0x%x) is not handled\n" ,break ;return ret;static const struct v4l2_ctrl_ops imx258_ctrl_ops = {static int imx258_enum_mbus_code(struct v4l2_subdev *sd,struct v4l2_subdev_state *sd_state,struct v4l2_subdev_mbus_code_enum *code)struct imx258 *imx258 = to_imx258(sd);/* Only one bayer format (10 bit) is supported */ if (code->index > 0 )return -EINVAL;return 0 ;static int imx258_enum_frame_size(struct v4l2_subdev *sd,struct v4l2_subdev_state *sd_state,struct v4l2_subdev_frame_size_enum *fse)struct imx258 *imx258 = to_imx258(sd);if (fse->index >= ARRAY_SIZE(supported_modes))return -EINVAL;if (fse->code != imx258_get_format_code(imx258))return -EINVAL;return 0 ;static void imx258_update_pad_format(struct imx258 *imx258,const struct imx258_mode *mode,struct v4l2_subdev_format *fmt)static int __imx258_get_pad_format(struct imx258 *imx258,struct v4l2_subdev_state *sd_state,struct v4l2_subdev_format *fmt)if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)else return 0 ;static int imx258_get_pad_format(struct v4l2_subdev *sd,struct v4l2_subdev_state *sd_state,struct v4l2_subdev_format *fmt)struct imx258 *imx258 = to_imx258(sd);int ret;return ret;static int imx258_set_pad_format(struct v4l2_subdev *sd,struct v4l2_subdev_state *sd_state,struct v4l2_subdev_format *fmt)struct imx258 *imx258 = to_imx258(sd);const struct imx258_link_freq_config *link_freq_cfgs;const struct imx258_link_cfg *link_cfg;struct v4l2_mbus_framefmt *framefmt;const struct imx258_mode *mode;if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {else {1 , pixel_rate);/* Update limits and set FPS to default */ 1 ,1 , h_blank);return 0 ;static const struct v4l2_rect *struct imx258 *imx258,struct v4l2_subdev_state *sd_state,unsigned int pad, enum v4l2_subdev_format_whence which)switch (which) {case V4L2_SUBDEV_FORMAT_TRY:return v4l2_subdev_state_get_crop(sd_state, pad);case V4L2_SUBDEV_FORMAT_ACTIVE:return &imx258->cur_mode->crop;return NULL;static int imx258_get_selection(struct v4l2_subdev *sd,struct v4l2_subdev_state *sd_state,struct v4l2_subdev_selection *sel)switch (sel->target) {case V4L2_SEL_TGT_CROP: {struct imx258 *imx258 = to_imx258(sd);return 0 ;case V4L2_SEL_TGT_NATIVE_SIZE:0 ;0 ;return 0 ;case V4L2_SEL_TGT_CROP_DEFAULT:case V4L2_SEL_TGT_CROP_BOUNDS:return 0 ;return -EINVAL;/* Start streaming */ static int imx258_start_streaming(struct imx258 *imx258)struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);const struct imx258_reg_list *reg_list;const struct imx258_link_freq_config *link_freq_cfg;int ret, link_freq_index;0 x01, NULL);if (ret) {"%s failed to reset sensor\n" , __func__);return ret;/* 12ms is required from poweron to standby */ 12000 );/* Setup PLL */ if (ret) {"%s failed to set plls\n" , __func__);return ret;if (ret) {"%s failed to set common regs\n" , __func__);return ret;if (ret) {"%s failed to set variant config\n" ,return ret;if (ret) {"%s failed to set clock lane mode\n" , __func__);return ret;/* Apply default values of current mode */ if (ret) {"%s failed to set mode\n" , __func__);return ret;/* Apply customized values from user */ if (ret)return ret;/* set stream on register */ return cci_write(imx258->regmap, IMX258_REG_MODE_SELECT,/* Stop streaming */ static int imx258_stop_streaming(struct imx258 *imx258)struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);int ret;/* set stream off register */ if (ret)"%s failed to set stream\n" , __func__);/* * Return success even if it was an error, as there is nothing the * caller can do about it. return 0 ;static int imx258_power_on(struct device *dev)struct v4l2_subdev *sd = dev_get_drvdata(dev);struct imx258 *imx258 = to_imx258(sd);int ret;if (ret) {"%s: failed to enable regulators\n" ,return ret;if (ret) {"failed to enable clock\n" );return ret;static int imx258_power_off(struct device *dev)struct v4l2_subdev *sd = dev_get_drvdata(dev);struct imx258 *imx258 = to_imx258(sd);return 0 ;static int imx258_set_stream(struct v4l2_subdev *sd, int enable)struct imx258 *imx258 = to_imx258(sd);struct i2c_client *client = v4l2_get_subdevdata(sd);int ret = 0 ;if (enable) {if (ret < 0 )goto err_unlock;/* * Apply default & customized values * and then start streaming. if (ret)goto err_rpm_put;else {return ret;return ret;/* Verify chip ID */ static int imx258_identify_module(struct imx258 *imx258)struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);int ret;if (ret) {"failed to read chip id %x\n" ,return ret;if (val != IMX258_CHIP_ID) {"chip id mismatch: %x!=%llx\n" ,return -EIO;return 0 ;static const struct v4l2_subdev_video_ops imx258_video_ops = {static const struct v4l2_subdev_pad_ops imx258_pad_ops = {static const struct v4l2_subdev_ops imx258_subdev_ops = {static const struct v4l2_subdev_internal_ops imx258_internal_ops = {/* Initialize control handlers */ static int imx258_init_controls(struct imx258 *imx258)struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);const struct imx258_link_freq_config *link_freq_cfgs;struct v4l2_fwnode_device_properties props;struct v4l2_ctrl_handler *ctrl_hdlr;const struct imx258_link_cfg *link_cfg;int ret;13 );if (ret)return ret;1 ,0 ,if (imx258->link_freq)0 , 1 , 1 , 1 );if (imx258->hflip)0 , 1 , 1 , 1 );if (imx258->vflip)0 ];0 ],/* By default, PIXEL_RATE is read only */ 1 , pixel_rate);1 ,1 ,if (imx258->hblank)0 , 1 , 1 , IMX258_HDR_RATIO_DEFAULT);1 ,0 , 0 , imx258_test_pattern_menu);if (ctrl_hdlr->error) {"%s control init failed (%d)\n" ,goto error;if (ret)goto error;if (ret)goto error;return 0 ;return ret;static void imx258_free_controls(struct imx258 *imx258)static int imx258_get_regulators(struct imx258 *imx258,struct i2c_client *client)unsigned int i;for (i = 0 ; i < IMX258_NUM_SUPPLIES; i++)return devm_regulator_bulk_get(&client->dev,static int imx258_probe(struct i2c_client *client)struct imx258 *imx258;struct fwnode_handle *endpoint;struct v4l2_fwnode_endpoint ep = {int ret;0 ;sizeof (*imx258), GFP_KERNEL);if (!imx258)return -ENOMEM;16 );if (IS_ERR(imx258->regmap)) {"failed to initialize CCI: %d\n" , ret);return ret;if (ret)return dev_err_probe(&client->dev, ret,"failed to get regulators\n" );if (IS_ERR(imx258->clk))return dev_err_probe(&client->dev, PTR_ERR(imx258->clk),"error getting clock\n" );if (!imx258->clk) {"no clock provided, using clock-frequency property\n" );"clock-frequency" , &val);else {switch (val) {case 19200000 :break ;case 24000000 :break ;default :"input clock frequency of %u not supported\n" ,return -EINVAL;if (!endpoint) {"Endpoint node not found\n" );return -EINVAL;if (ret) {"Parsing endpoint node failed\n" );return ret;if (ret) {"Link frequency not supported\n" );goto error_endpoint_free;/* Get number of data lanes */ switch (ep.bus.mipi_csi2.num_data_lanes) {case 2 :break ;case 4 :break ;default :"Invalid data lanes: %u\n" ,goto error_endpoint_free;if (!imx258->variant_cfg)/* Initialize subdev */ /* Will be powered off via pm_runtime_idle */ if (ret)goto error_endpoint_free;/* Check module identity */ if (ret)goto error_identify;/* Set default mode to max resolution */ 0 ];if (ret)goto error_identify;/* Initialize subdev */ /* Initialize source pad */ 1 , &imx258->pad);if (ret)goto error_handler_free;if (ret < 0 )goto error_media_entity;return 0 ;return ret;static void imx258_remove(struct i2c_client *client)struct v4l2_subdev *sd = i2c_get_clientdata(client);struct imx258 *imx258 = to_imx258(sd);if (!pm_runtime_status_suspended(&client->dev))static const struct dev_pm_ops imx258_pm_ops = {#ifdef CONFIG_ACPIstatic const struct acpi_device_id imx258_acpi_ids[] = {"SONY258A" },/* sentinel */ } #endif static const struct of_device_id imx258_dt_ids[] = {"sony,imx258" , .data = &imx258_cfg },"sony,imx258-pdaf" , .data = &imx258_pdaf_cfg },/* sentinel */ } static struct i2c_driver imx258_i2c_driver = {"imx258" ,"Yeh, Andy <andy.yeh@intel.com>" );"Chiang, Alan" );"Chen, Jason" );"Sony IMX258 sensor driver" );"GPL v2" );
Messung V0.5 in Prozent C=88 H=95 G=91
¤ Dauer der Verarbeitung: 0.17 Sekunden
(vorverarbeitet am 2026-06-05)
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