/* Double check that unsupported cores are not enabled */ #if CONF_MSK(D11CONF, 0x4f) || CONF_GE(D11CONF, MAXCOREREV) #error"Configuration for D11CONF includes unsupported versions." #endif/* Bad versions */
/* values for shortslot_override */ #define BRCMS_SHORTSLOT_AUTO -1/* Driver will manage Shortslot setting */ #define BRCMS_SHORTSLOT_OFF 0/* Turn off short slot */ #define BRCMS_SHORTSLOT_ON 1/* Turn on short slot */
/* Interrupt bit error summary. Don't include I_RU: we refill DMA at other *times;andifwerunout,constantI_RUinterruptsmaycauselockup.We *willstillgeterrorcountsfromrx0ovfl.
*/ #define I_ERRORS (I_PC | I_PD | I_DE | I_RO | I_XU) /* default software intmasks */ #define DEF_RXINTMASK (I_RI) /* enable rx int on rxfifo only */ #define DEF_MACINTMASK (MI_TXSTOP | MI_TBTT | MI_ATIMWINEND | MI_PMQ | \
MI_PHYTXERR | MI_DMAINT | MI_TFS | MI_BG_NOISE | \
MI_CCA | MI_TO | MI_GP0 | MI_RFDISABLE | MI_PWRUP)
#define MAXTXPKTS 6/* max # pkts pending */
/* frameburst */ #define MAXTXFRAMEBURST 8/* vanilla xpress mode: max frames/burst */ #define MAXFRAMEBURST_TXOP 10000/* Frameburst TXOP in usec */
#define NFIFO 6/* # tx/rx fifopairs */
/* PLL requests */
/* pll is shared on old chips */ #define BRCMS_PLLREQ_SHARED 0x1 /* hold pll for radio monitor register checking */ #define BRCMS_PLLREQ_RADIO_MON 0x2 /* hold/release pll for some short operation */ #define BRCMS_PLLREQ_FLIP 0x4
/* *bandstate(phy+ana+radio)
*/ struct brcms_band { int bandtype; /* BRCM_BAND_2G, BRCM_BAND_5G */
uint bandunit; /* bandstate[] index */
u16 phytype; /* phytype */
u16 phyrev;
u16 radioid;
u16 radiorev; struct brcms_phy_pub *pi; /* pointer to phy specific information */ bool abgphy_encore;
u8 gmode; /* currently active gmode */
struct scb *hwrs_scb; /* permanent scb for hw rateset */
/* band-specific copy of default_bss.rateset */ struct brcms_c_rateset defrateset;
u8 band_stf_ss_mode; /* Configured STF type, 0:siso; 1:cdd */
s8 band_stf_stbc_tx; /* STBC TX 0:off; 1:force on; -1:auto */ /* rates supported by chip (phy-specific) */ struct brcms_c_rateset hw_rateset;
u8 basic_rate[BRCM_MAXRATE + 1]; /* basic rates indexed by rate */ bool mimo_cap_40; /* 40 MHz cap enabled on this band */
s8 antgain; /* antenna gain from srom */
u16 CWmin; /* minimum size of contention window, in unit of aSlotTime */
u16 CWmax; /* maximum size of contention window, in unit of aSlotTime */ struct ieee80211_supported_band band;
};
/* module control blocks */ struct modulecb { /* module name : NULL indicates empty array member */ char name[32]; /* handle passed when handler 'doiovar' is called */ struct brcms_info *hdl;
int (*down_fn)(void *handle); /* down handler. Note: the int returned *bythedownfunctionisacountofthe *numberoftimersthatcouldnotbe *freed.
*/
/* version info */
u16 vendorid; /* PCI vendor id */
u16 deviceid; /* PCI device id */
uint corerev; /* core revision */
u8 sromrev; /* version # of the srom */
u16 boardrev; /* version # of particular board */
u32 boardflags; /* Board specific flags from srom */
u32 boardflags2; /* More board flags if sromrev >= 4 */
u32 machwcap; /* MAC capabilities */
u32 machwcap_backup; /* backup of machwcap */
struct si_pub *sih; /* SI handle (cookie for siutils calls) */ struct bcma_device *d11core; /* pointer to 802.11 core */ struct phy_shim_info *physhim; /* phy shim layer handler */ struct shared_phy *phy_sh; /* pointer to shared phy state */ struct brcms_hw_band *band;/* pointer to active per-band state */ /* band state per phy/radio */ struct brcms_hw_band *bandstate[MAXBANDS];
u16 bmac_phytxant; /* cache of high phytxant state */ bool shortslot; /* currently using 11g ShortSlot timing */
u16 SRL; /* 802.11 dot11ShortRetryLimit */
u16 LRL; /* 802.11 dot11LongRetryLimit */
u16 SFBL; /* Short Frame Rate Fallback Limit */
u16 LFBL; /* Long Frame Rate Fallback Limit */
uint *txavail[NFIFO]; /* # tx descriptors available */ const u16 *xmtfifo_sz; /* fifo size in 256B for each xmt fifo */
u32 pllreq; /* pll requests to keep PLL on */
u8 suspended_fifos; /* Which TX fifo to remain awake for */
u32 maccontrol; /* Cached value of maccontrol */
uint mac_suspend_depth; /* current depth of mac_suspend levels */
u32 wake_override; /* bit flags to force MAC to WAKE mode */
u32 mute_override; /* Prevent ucode from sending beacons */
u8 etheraddr[ETH_ALEN]; /* currently configured ethernet address */ bool noreset; /* true= do not reset hw, used by WLC_OUT */ bool forcefastclk; /* true if h/w is forcing to use fast clk */ bool clk; /* core is out of reset and has clock */ bool sbclk; /* sb has clock */ bool phyclk; /* phy is out of reset and has clock */
bool ucode_loaded; /* true after ucode downloaded */
u8 hw_stf_ss_opmode; /* STF single stream operation mode */
u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic *0=N/A,1=2x4board,2=2x3CB2board
*/
u32 antsel_avail; /* *putstructantsel_infohereifmoreinfois *needed
*/
};
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