/*
* SMU_7_1_1 Register documentation
*
* Copyright (C) 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef SMU_7_1_1_D_H
#define SMU_7_1_1_D_H
#define mmGCK_SMC_IND_INDEX 0 x80
#define mmGCK0_GCK_SMC_IND_INDEX 0 x80
#define mmGCK1_GCK_SMC_IND_INDEX 0 x82
#define mmGCK2_GCK_SMC_IND_INDEX 0 x84
#define mmGCK3_GCK_SMC_IND_INDEX 0 x86
#define mmGCK_SMC_IND_DATA 0 x81
#define mmGCK0_GCK_SMC_IND_DATA 0 x81
#define mmGCK1_GCK_SMC_IND_DATA 0 x83
#define mmGCK2_GCK_SMC_IND_DATA 0 x85
#define mmGCK3_GCK_SMC_IND_DATA 0 x87
#define ixCG_DCLK_CNTL 0 xc050009c
#define ixCG_DCLK_STATUS 0 xc05000a0
#define ixCG_VCLK_CNTL 0 xc05000a4
#define ixCG_VCLK_STATUS 0 xc05000a8
#define ixCG_ECLK_CNTL 0 xc05000ac
#define ixCG_ECLK_STATUS 0 xc05000b0
#define ixCG_ACLK_CNTL 0 xc05000dc
#define ixGCK_DFS_BYPASS_CNTL 0 xc0500118
#define ixCG_SPLL_FUNC_CNTL 0 xc0500140
#define ixCG_SPLL_FUNC_CNTL_2 0 xc0500144
#define ixCG_SPLL_FUNC_CNTL_3 0 xc0500148
#define ixCG_SPLL_FUNC_CNTL_4 0 xc050014c
#define ixCG_SPLL_FUNC_CNTL_5 0 xc0500150
#define ixCG_SPLL_FUNC_CNTL_6 0 xc0500154
#define ixCG_SPLL_FUNC_CNTL_7 0 xc0500158
#define ixSPLL_CNTL_MODE 0 xc0500160
#define ixCG_SPLL_SPREAD_SPECTRUM 0 xc0500164
#define ixCG_SPLL_SPREAD_SPECTRUM_2 0 xc0500168
#define ixMPLL_BYPASSCLK_SEL 0 xc050019c
#define ixCG_CLKPIN_CNTL 0 xc05001a0
#define ixCG_CLKPIN_CNTL_2 0 xc05001a4
#define ixCG_CLKPIN_CNTL_DC 0 xc0500204
#define ixTHM_CLK_CNTL 0 xc05001a8
#define ixMISC_CLK_CTRL 0 xc05001ac
#define ixGCK_PLL_TEST_CNTL 0 xc05001c0
#define ixGCK_PLL_TEST_CNTL_2 0 xc05001c4
#define ixGCK_ADFS_CLK_BYPASS_CNTL1 0 xc05001c8
#define mmSMC_IND_INDEX 0 x80
#define mmSMC0_SMC_IND_INDEX 0 x80
#define mmSMC1_SMC_IND_INDEX 0 x82
#define mmSMC2_SMC_IND_INDEX 0 x84
#define mmSMC3_SMC_IND_INDEX 0 x86
#define mmSMC_IND_DATA 0 x81
#define mmSMC0_SMC_IND_DATA 0 x81
#define mmSMC1_SMC_IND_DATA 0 x83
#define mmSMC2_SMC_IND_DATA 0 x85
#define mmSMC3_SMC_IND_DATA 0 x87
#define mmSMC_IND_INDEX_0 0 x80
#define mmSMC_IND_DATA_0 0 x81
#define mmSMC_IND_INDEX_1 0 x82
#define mmSMC_IND_DATA_1 0 x83
#define mmSMC_IND_INDEX_2 0 x84
#define mmSMC_IND_DATA_2 0 x85
#define mmSMC_IND_INDEX_3 0 x86
#define mmSMC_IND_DATA_3 0 x87
#define mmSMC_IND_INDEX_4 0 x88
#define mmSMC_IND_DATA_4 0 x89
#define mmSMC_IND_INDEX_5 0 x8a
#define mmSMC_IND_DATA_5 0 x8b
#define mmSMC_IND_INDEX_6 0 x8c
#define mmSMC_IND_DATA_6 0 x8d
#define mmSMC_IND_INDEX_7 0 x8e
#define mmSMC_IND_DATA_7 0 x8f
#define mmSMC_IND_ACCESS_CNTL 0 x92
#define mmSMC_MESSAGE_0 0 x94
#define mmSMC_RESP_0 0 x95
#define mmSMC_MESSAGE_1 0 x96
#define mmSMC_RESP_1 0 x97
#define mmSMC_MESSAGE_2 0 x98
#define mmSMC_RESP_2 0 x99
#define mmSMC_MESSAGE_3 0 x9a
#define mmSMC_RESP_3 0 x9b
#define mmSMC_MESSAGE_4 0 x9c
#define mmSMC_RESP_4 0 x9d
#define mmSMC_MESSAGE_5 0 x9e
#define mmSMC_RESP_5 0 x9f
#define mmSMC_MESSAGE_6 0 xa0
#define mmSMC_RESP_6 0 xa1
#define mmSMC_MESSAGE_7 0 xa2
#define mmSMC_RESP_7 0 xa3
#define mmSMC_MSG_ARG_0 0 xa4
#define mmSMC_MSG_ARG_1 0 xa5
#define mmSMC_MSG_ARG_2 0 xa6
#define mmSMC_MSG_ARG_3 0 xa7
#define mmSMC_MSG_ARG_4 0 xa8
#define mmSMC_MSG_ARG_5 0 xa9
#define mmSMC_MSG_ARG_6 0 xaa
#define mmSMC_MSG_ARG_7 0 xab
#define mmSMC_MESSAGE_8 0 xb5
#define mmSMC_RESP_8 0 xb6
#define mmSMC_MESSAGE_9 0 xb7
#define mmSMC_RESP_9 0 xb8
#define mmSMC_MESSAGE_10 0 xb9
#define mmSMC_RESP_10 0 xba
#define mmSMC_MESSAGE_11 0 xbb
#define mmSMC_RESP_11 0 xbc
#define mmSMC_MSG_ARG_8 0 xbd
#define mmSMC_MSG_ARG_9 0 xbe
#define mmSMC_MSG_ARG_10 0 xbf
#define mmSMC_MSG_ARG_11 0 x93
#define ixSMC_SYSCON_RESET_CNTL 0 x80000000
#define ixSMC_SYSCON_CLOCK_CNTL_0 0 x80000004
#define ixSMC_SYSCON_CLOCK_CNTL_1 0 x80000008
#define ixSMC_SYSCON_CLOCK_CNTL_2 0 x8000000c
#define ixSMC_SYSCON_MISC_CNTL 0 x80000010
#define ixSMC_SYSCON_MSG_ARG_0 0 x80000068
#define ixSMC_PC_C 0 x80000370
#define ixSMC_SCRATCH9 0 x80000424
#define mmGPIOPAD_SW_INT_STAT 0 x180
#define mmGPIOPAD_STRENGTH 0 x181
#define mmGPIOPAD_MASK 0 x182
#define mmGPIOPAD_A 0 x183
#define mmGPIOPAD_EN 0 x184
#define mmGPIOPAD_Y 0 x185
#define mmGPIOPAD_PINSTRAPS 0 x186
#define mmGPIOPAD_INT_STAT_EN 0 x187
#define mmGPIOPAD_INT_STAT 0 x188
#define mmGPIOPAD_INT_STAT_AK 0 x189
#define mmGPIOPAD_INT_EN 0 x18a
#define mmGPIOPAD_INT_TYPE 0 x18b
#define mmGPIOPAD_INT_POLARITY 0 x18c
#define mmGPIOPAD_EXTERN_TRIG_CNTL 0 x18d
#define mmGPIOPAD_RCVR_SEL 0 x191
#define mmGPIOPAD_PU_EN 0 x192
#define mmGPIOPAD_PD_EN 0 x193
#define mmCG_FPS_CNT 0 x1b6
#define mmSMU_IND_INDEX_0 0 x1a6
#define mmSMU_IND_DATA_0 0 x1a7
#define mmSMU_IND_INDEX_1 0 x1a8
#define mmSMU_IND_DATA_1 0 x1a9
#define mmSMU_IND_INDEX_2 0 x1aa
#define mmSMU_IND_DATA_2 0 x1ab
#define mmSMU_IND_INDEX_3 0 x1ac
#define mmSMU_IND_DATA_3 0 x1ad
#define mmSMU_IND_INDEX_4 0 x1ae
#define mmSMU_IND_DATA_4 0 x1af
#define mmSMU_IND_INDEX_5 0 x1b0
#define mmSMU_IND_DATA_5 0 x1b1
#define mmSMU_IND_INDEX_6 0 x1b2
#define mmSMU_IND_DATA_6 0 x1b3
#define mmSMU_IND_INDEX_7 0 x1b4
#define mmSMU_IND_DATA_7 0 x1b5
#define mmSMU_SMC_IND_INDEX 0 x80
#define mmSMU0_SMU_SMC_IND_INDEX 0 x80
#define mmSMU1_SMU_SMC_IND_INDEX 0 x82
#define mmSMU2_SMU_SMC_IND_INDEX 0 x84
#define mmSMU3_SMU_SMC_IND_INDEX 0 x86
#define mmSMU_SMC_IND_DATA 0 x81
#define mmSMU0_SMU_SMC_IND_DATA 0 x81
#define mmSMU1_SMU_SMC_IND_DATA 0 x83
#define mmSMU2_SMU_SMC_IND_DATA 0 x85
#define mmSMU3_SMU_SMC_IND_DATA 0 x87
#define mmSMC_IND_INDEX_11 0 x1AC
#define mmSMC_IND_DATA_11 0 x1AD
#define ixRCU_UC_EVENTS 0 xc0000004
#define ixRCU_MISC_CTRL 0 xc0000010
#define ixCC_RCU_FUSES 0 xc00c0000
#define ixCC_SMU_MISC_FUSES 0 xc00c0004
#define ixCC_SCLK_VID_FUSES 0 xc00c0008
#define ixCC_GIO_IOCCFG_FUSES 0 xc00c000c
#define ixCC_GIO_IOC_FUSES 0 xc00c0010
#define ixCC_SMU_TST_EFUSE1_MISC 0 xc00c001c
#define ixCC_TST_ID_STRAPS 0 xc00c0020
#define ixCC_FCTRL_FUSES 0 xc00c0024
#define ixCC_HARVEST_FUSES 0 xc00c0028
#define ixSMU_MAIN_PLL_OP_FREQ 0 xe0003020
#define ixSMU_STATUS 0 xe0003088
#define ixSMU_FIRMWARE 0 xe00030a4
#define ixSMU_INPUT_DATA 0 xe00030b8
#define ixSMU_EFUSE_0 0 xc0100000
#define ixMCARB_DRAM_TIMING_TABLE_1 0 x33018
#define ixMCARB_DRAM_TIMING_TABLE_2 0 x3301c
#define ixMCARB_DRAM_TIMING_TABLE_3 0 x33020
#define ixMCARB_DRAM_TIMING_TABLE_4 0 x33024
#define ixMCARB_DRAM_TIMING_TABLE_5 0 x33028
#define ixMCARB_DRAM_TIMING_TABLE_6 0 x3302c
#define ixMCARB_DRAM_TIMING_TABLE_7 0 x33030
#define ixMCARB_DRAM_TIMING_TABLE_8 0 x33034
#define ixMCARB_DRAM_TIMING_TABLE_9 0 x33038
#define ixMCARB_DRAM_TIMING_TABLE_10 0 x3303c
#define ixMCARB_DRAM_TIMING_TABLE_11 0 x33040
#define ixMCARB_DRAM_TIMING_TABLE_12 0 x33044
#define ixMCARB_DRAM_TIMING_TABLE_13 0 x33048
#define ixMCARB_DRAM_TIMING_TABLE_14 0 x3304c
#define ixMCARB_DRAM_TIMING_TABLE_15 0 x33050
#define ixMCARB_DRAM_TIMING_TABLE_16 0 x33054
#define ixMCARB_DRAM_TIMING_TABLE_17 0 x33058
#define ixMCARB_DRAM_TIMING_TABLE_18 0 x3305c
#define ixMCARB_DRAM_TIMING_TABLE_19 0 x33060
#define ixMCARB_DRAM_TIMING_TABLE_20 0 x33064
#define ixMCARB_DRAM_TIMING_TABLE_21 0 x33068
#define ixMCARB_DRAM_TIMING_TABLE_22 0 x3306c
#define ixMCARB_DRAM_TIMING_TABLE_23 0 x33070
#define ixMCARB_DRAM_TIMING_TABLE_24 0 x33074
#define ixMCARB_DRAM_TIMING_TABLE_25 0 x33078
#define ixMCARB_DRAM_TIMING_TABLE_26 0 x3307c
#define ixMCARB_DRAM_TIMING_TABLE_27 0 x33080
#define ixMCARB_DRAM_TIMING_TABLE_28 0 x33084
#define ixMCARB_DRAM_TIMING_TABLE_29 0 x33088
#define ixMCARB_DRAM_TIMING_TABLE_30 0 x3308c
#define ixMCARB_DRAM_TIMING_TABLE_31 0 x33090
#define ixMCARB_DRAM_TIMING_TABLE_32 0 x33094
#define ixMCARB_DRAM_TIMING_TABLE_33 0 x33098
#define ixMCARB_DRAM_TIMING_TABLE_34 0 x3309c
#define ixMCARB_DRAM_TIMING_TABLE_35 0 x330a0
#define ixMCARB_DRAM_TIMING_TABLE_36 0 x330a4
#define ixMCARB_DRAM_TIMING_TABLE_37 0 x330a8
#define ixMCARB_DRAM_TIMING_TABLE_38 0 x330ac
#define ixMCARB_DRAM_TIMING_TABLE_39 0 x330b0
#define ixMCARB_DRAM_TIMING_TABLE_40 0 x330b4
#define ixMCARB_DRAM_TIMING_TABLE_41 0 x330b8
#define ixMCARB_DRAM_TIMING_TABLE_42 0 x330bc
#define ixMCARB_DRAM_TIMING_TABLE_43 0 x330c0
#define ixMCARB_DRAM_TIMING_TABLE_44 0 x330c4
#define ixMCARB_DRAM_TIMING_TABLE_45 0 x330c8
#define ixMCARB_DRAM_TIMING_TABLE_46 0 x330cc
#define ixMCARB_DRAM_TIMING_TABLE_47 0 x330d0
#define ixMCARB_DRAM_TIMING_TABLE_48 0 x330d4
#define ixMCARB_DRAM_TIMING_TABLE_49 0 x330d8
#define ixMCARB_DRAM_TIMING_TABLE_50 0 x330dc
#define ixMCARB_DRAM_TIMING_TABLE_51 0 x330e0
#define ixMCARB_DRAM_TIMING_TABLE_52 0 x330e4
#define ixMCARB_DRAM_TIMING_TABLE_53 0 x330e8
#define ixMCARB_DRAM_TIMING_TABLE_54 0 x330ec
#define ixMCARB_DRAM_TIMING_TABLE_55 0 x330f0
#define ixMCARB_DRAM_TIMING_TABLE_56 0 x330f4
#define ixMCARB_DRAM_TIMING_TABLE_57 0 x330f8
#define ixMCARB_DRAM_TIMING_TABLE_58 0 x330fc
#define ixMCARB_DRAM_TIMING_TABLE_59 0 x33100
#define ixMCARB_DRAM_TIMING_TABLE_60 0 x33104
#define ixMCARB_DRAM_TIMING_TABLE_61 0 x33108
#define ixMCARB_DRAM_TIMING_TABLE_62 0 x3310c
#define ixMCARB_DRAM_TIMING_TABLE_63 0 x33110
#define ixMCARB_DRAM_TIMING_TABLE_64 0 x33114
#define ixMCARB_DRAM_TIMING_TABLE_65 0 x33118
#define ixMCARB_DRAM_TIMING_TABLE_66 0 x3311c
#define ixMCARB_DRAM_TIMING_TABLE_67 0 x33120
#define ixMCARB_DRAM_TIMING_TABLE_68 0 x33124
#define ixMCARB_DRAM_TIMING_TABLE_69 0 x33128
#define ixMCARB_DRAM_TIMING_TABLE_70 0 x3312c
#define ixMCARB_DRAM_TIMING_TABLE_71 0 x33130
#define ixMCARB_DRAM_TIMING_TABLE_72 0 x33134
#define ixMCARB_DRAM_TIMING_TABLE_73 0 x33138
#define ixMCARB_DRAM_TIMING_TABLE_74 0 x3313c
#define ixMCARB_DRAM_TIMING_TABLE_75 0 x33140
#define ixMCARB_DRAM_TIMING_TABLE_76 0 x33144
#define ixMCARB_DRAM_TIMING_TABLE_77 0 x33148
#define ixMCARB_DRAM_TIMING_TABLE_78 0 x3314c
#define ixMCARB_DRAM_TIMING_TABLE_79 0 x33150
#define ixMCARB_DRAM_TIMING_TABLE_80 0 x33154
#define ixMCARB_DRAM_TIMING_TABLE_81 0 x33158
#define ixMCARB_DRAM_TIMING_TABLE_82 0 x3315c
#define ixMCARB_DRAM_TIMING_TABLE_83 0 x33160
#define ixMCARB_DRAM_TIMING_TABLE_84 0 x33164
#define ixMCARB_DRAM_TIMING_TABLE_85 0 x33168
#define ixMCARB_DRAM_TIMING_TABLE_86 0 x3316c
#define ixMCARB_DRAM_TIMING_TABLE_87 0 x33170
#define ixMCARB_DRAM_TIMING_TABLE_88 0 x33174
#define ixMCARB_DRAM_TIMING_TABLE_89 0 x33178
#define ixMCARB_DRAM_TIMING_TABLE_90 0 x3317c
#define ixMCARB_DRAM_TIMING_TABLE_91 0 x33180
#define ixMCARB_DRAM_TIMING_TABLE_92 0 x33184
#define ixMCARB_DRAM_TIMING_TABLE_93 0 x33188
#define ixMCARB_DRAM_TIMING_TABLE_94 0 x3318c
#define ixMCARB_DRAM_TIMING_TABLE_95 0 x33190
#define ixMCARB_DRAM_TIMING_TABLE_96 0 x33194
#define ixMC_REGISTERS_TABLE_1 0 x33198
#define ixMC_REGISTERS_TABLE_2 0 x3319c
#define ixMC_REGISTERS_TABLE_3 0 x331a0
#define ixMC_REGISTERS_TABLE_4 0 x331a4
#define ixMC_REGISTERS_TABLE_5 0 x331a8
#define ixMC_REGISTERS_TABLE_6 0 x331ac
#define ixMC_REGISTERS_TABLE_7 0 x331b0
#define ixMC_REGISTERS_TABLE_8 0 x331b4
#define ixMC_REGISTERS_TABLE_9 0 x331b8
#define ixMC_REGISTERS_TABLE_10 0 x331bc
#define ixMC_REGISTERS_TABLE_11 0 x331c0
#define ixMC_REGISTERS_TABLE_12 0 x331c4
#define ixMC_REGISTERS_TABLE_13 0 x331c8
#define ixMC_REGISTERS_TABLE_14 0 x331cc
#define ixMC_REGISTERS_TABLE_15 0 x331d0
#define ixMC_REGISTERS_TABLE_16 0 x331d4
#define ixMC_REGISTERS_TABLE_17 0 x331d8
#define ixMC_REGISTERS_TABLE_18 0 x331dc
#define ixMC_REGISTERS_TABLE_19 0 x331e0
#define ixMC_REGISTERS_TABLE_20 0 x331e4
#define ixMC_REGISTERS_TABLE_21 0 x331e8
#define ixMC_REGISTERS_TABLE_22 0 x331ec
#define ixMC_REGISTERS_TABLE_23 0 x331f0
#define ixMC_REGISTERS_TABLE_24 0 x331f4
#define ixMC_REGISTERS_TABLE_25 0 x331f8
#define ixMC_REGISTERS_TABLE_26 0 x331fc
#define ixMC_REGISTERS_TABLE_27 0 x33200
#define ixMC_REGISTERS_TABLE_28 0 x33204
#define ixMC_REGISTERS_TABLE_29 0 x33208
#define ixMC_REGISTERS_TABLE_30 0 x3320c
#define ixMC_REGISTERS_TABLE_31 0 x33210
#define ixMC_REGISTERS_TABLE_32 0 x33214
#define ixMC_REGISTERS_TABLE_33 0 x33218
#define ixMC_REGISTERS_TABLE_34 0 x3321c
#define ixMC_REGISTERS_TABLE_35 0 x33220
#define ixMC_REGISTERS_TABLE_36 0 x33224
#define ixMC_REGISTERS_TABLE_37 0 x33228
#define ixMC_REGISTERS_TABLE_38 0 x3322c
#define ixMC_REGISTERS_TABLE_39 0 x33230
#define ixMC_REGISTERS_TABLE_40 0 x33234
#define ixMC_REGISTERS_TABLE_41 0 x33238
#define ixMC_REGISTERS_TABLE_42 0 x3323c
#define ixMC_REGISTERS_TABLE_43 0 x33240
#define ixMC_REGISTERS_TABLE_44 0 x33244
#define ixMC_REGISTERS_TABLE_45 0 x33248
#define ixMC_REGISTERS_TABLE_46 0 x3324c
#define ixMC_REGISTERS_TABLE_47 0 x33250
#define ixMC_REGISTERS_TABLE_48 0 x33254
#define ixMC_REGISTERS_TABLE_49 0 x33258
#define ixMC_REGISTERS_TABLE_50 0 x3325c
#define ixMC_REGISTERS_TABLE_51 0 x33260
#define ixMC_REGISTERS_TABLE_52 0 x33264
#define ixMC_REGISTERS_TABLE_53 0 x33268
#define ixMC_REGISTERS_TABLE_54 0 x3326c
#define ixMC_REGISTERS_TABLE_55 0 x33270
#define ixMC_REGISTERS_TABLE_56 0 x33274
#define ixMC_REGISTERS_TABLE_57 0 x33278
#define ixMC_REGISTERS_TABLE_58 0 x3327c
#define ixMC_REGISTERS_TABLE_59 0 x33280
#define ixMC_REGISTERS_TABLE_60 0 x33284
#define ixMC_REGISTERS_TABLE_61 0 x33288
#define ixMC_REGISTERS_TABLE_62 0 x3328c
#define ixMC_REGISTERS_TABLE_63 0 x33290
#define ixMC_REGISTERS_TABLE_64 0 x33294
#define ixMC_REGISTERS_TABLE_65 0 x33298
#define ixMC_REGISTERS_TABLE_66 0 x3329c
#define ixMC_REGISTERS_TABLE_67 0 x332a0
#define ixMC_REGISTERS_TABLE_68 0 x332a4
#define ixMC_REGISTERS_TABLE_69 0 x332a8
#define ixMC_REGISTERS_TABLE_70 0 x332ac
#define ixMC_REGISTERS_TABLE_71 0 x332b0
#define ixMC_REGISTERS_TABLE_72 0 x332b4
#define ixMC_REGISTERS_TABLE_73 0 x332b8
#define ixMC_REGISTERS_TABLE_74 0 x332bc
#define ixMC_REGISTERS_TABLE_75 0 x332c0
#define ixMC_REGISTERS_TABLE_76 0 x332c4
#define ixMC_REGISTERS_TABLE_77 0 x332c8
#define ixMC_REGISTERS_TABLE_78 0 x332cc
#define ixMC_REGISTERS_TABLE_79 0 x332d0
#define ixMC_REGISTERS_TABLE_80 0 x332d4
#define ixMC_REGISTERS_TABLE_81 0 x332d8
#define ixDPM_TABLE_1 0 x332dc
#define ixDPM_TABLE_2 0 x332e0
#define ixDPM_TABLE_3 0 x332e4
#define ixDPM_TABLE_4 0 x332e8
#define ixDPM_TABLE_5 0 x332ec
#define ixDPM_TABLE_6 0 x332f0
#define ixDPM_TABLE_7 0 x332f4
#define ixDPM_TABLE_8 0 x332f8
#define ixDPM_TABLE_9 0 x332fc
#define ixDPM_TABLE_10 0 x33300
#define ixDPM_TABLE_11 0 x33304
#define ixDPM_TABLE_12 0 x33308
#define ixDPM_TABLE_13 0 x3330c
#define ixDPM_TABLE_14 0 x33310
#define ixDPM_TABLE_15 0 x33314
#define ixDPM_TABLE_16 0 x33318
#define ixDPM_TABLE_17 0 x3331c
#define ixDPM_TABLE_18 0 x33320
#define ixDPM_TABLE_19 0 x33324
#define ixDPM_TABLE_20 0 x33328
#define ixDPM_TABLE_21 0 x3332c
#define ixDPM_TABLE_22 0 x33330
#define ixDPM_TABLE_23 0 x33334
#define ixDPM_TABLE_24 0 x33338
#define ixDPM_TABLE_25 0 x3333c
#define ixDPM_TABLE_26 0 x33340
#define ixDPM_TABLE_27 0 x33344
#define ixDPM_TABLE_28 0 x33348
#define ixDPM_TABLE_29 0 x3334c
#define ixDPM_TABLE_30 0 x33350
#define ixDPM_TABLE_31 0 x33354
#define ixDPM_TABLE_32 0 x33358
#define ixDPM_TABLE_33 0 x3335c
#define ixDPM_TABLE_34 0 x33360
#define ixDPM_TABLE_35 0 x33364
#define ixDPM_TABLE_36 0 x33368
#define ixDPM_TABLE_37 0 x3336c
#define ixDPM_TABLE_38 0 x33370
#define ixDPM_TABLE_39 0 x33374
#define ixDPM_TABLE_40 0 x33378
#define ixDPM_TABLE_41 0 x3337c
#define ixDPM_TABLE_42 0 x33380
#define ixDPM_TABLE_43 0 x33384
#define ixDPM_TABLE_44 0 x33388
#define ixDPM_TABLE_45 0 x3338c
#define ixDPM_TABLE_46 0 x33390
#define ixDPM_TABLE_47 0 x33394
#define ixDPM_TABLE_48 0 x33398
#define ixDPM_TABLE_49 0 x3339c
#define ixDPM_TABLE_50 0 x333a0
#define ixDPM_TABLE_51 0 x333a4
#define ixDPM_TABLE_52 0 x333a8
#define ixDPM_TABLE_53 0 x333ac
#define ixDPM_TABLE_54 0 x333b0
#define ixDPM_TABLE_55 0 x333b4
#define ixDPM_TABLE_56 0 x333b8
#define ixDPM_TABLE_57 0 x333bc
#define ixDPM_TABLE_58 0 x333c0
#define ixDPM_TABLE_59 0 x333c4
#define ixDPM_TABLE_60 0 x333c8
#define ixDPM_TABLE_61 0 x333cc
#define ixDPM_TABLE_62 0 x333d0
#define ixDPM_TABLE_63 0 x333d4
#define ixDPM_TABLE_64 0 x333d8
#define ixDPM_TABLE_65 0 x333dc
#define ixDPM_TABLE_66 0 x333e0
#define ixDPM_TABLE_67 0 x333e4
#define ixDPM_TABLE_68 0 x333e8
#define ixDPM_TABLE_69 0 x333ec
#define ixDPM_TABLE_70 0 x333f0
#define ixDPM_TABLE_71 0 x333f4
#define ixDPM_TABLE_72 0 x333f8
#define ixDPM_TABLE_73 0 x333fc
#define ixDPM_TABLE_74 0 x33400
#define ixDPM_TABLE_75 0 x33404
#define ixDPM_TABLE_76 0 x33408
#define ixDPM_TABLE_77 0 x3340c
#define ixDPM_TABLE_78 0 x33410
#define ixDPM_TABLE_79 0 x33414
#define ixDPM_TABLE_80 0 x33418
#define ixDPM_TABLE_81 0 x3341c
#define ixDPM_TABLE_82 0 x33420
#define ixDPM_TABLE_83 0 x33424
#define ixDPM_TABLE_84 0 x33428
#define ixDPM_TABLE_85 0 x3342c
#define ixDPM_TABLE_86 0 x33430
#define ixDPM_TABLE_87 0 x33434
#define ixDPM_TABLE_88 0 x33438
#define ixDPM_TABLE_89 0 x3343c
#define ixDPM_TABLE_90 0 x33440
#define ixDPM_TABLE_91 0 x33444
#define ixDPM_TABLE_92 0 x33448
#define ixDPM_TABLE_93 0 x3344c
#define ixDPM_TABLE_94 0 x33450
#define ixDPM_TABLE_95 0 x33454
#define ixDPM_TABLE_96 0 x33458
#define ixDPM_TABLE_97 0 x3345c
#define ixDPM_TABLE_98 0 x33460
#define ixDPM_TABLE_99 0 x33464
#define ixDPM_TABLE_100 0 x33468
#define ixDPM_TABLE_101 0 x3346c
#define ixDPM_TABLE_102 0 x33470
#define ixDPM_TABLE_103 0 x33474
#define ixDPM_TABLE_104 0 x33478
#define ixDPM_TABLE_105 0 x3347c
#define ixDPM_TABLE_106 0 x33480
#define ixDPM_TABLE_107 0 x33484
#define ixDPM_TABLE_108 0 x33488
#define ixDPM_TABLE_109 0 x3348c
#define ixDPM_TABLE_110 0 x33490
#define ixDPM_TABLE_111 0 x33494
#define ixDPM_TABLE_112 0 x33498
#define ixDPM_TABLE_113 0 x3349c
#define ixDPM_TABLE_114 0 x334a0
#define ixDPM_TABLE_115 0 x334a4
#define ixDPM_TABLE_116 0 x334a8
#define ixDPM_TABLE_117 0 x334ac
#define ixDPM_TABLE_118 0 x334b0
#define ixDPM_TABLE_119 0 x334b4
#define ixDPM_TABLE_120 0 x334b8
#define ixDPM_TABLE_121 0 x334bc
#define ixDPM_TABLE_122 0 x334c0
#define ixDPM_TABLE_123 0 x334c4
#define ixDPM_TABLE_124 0 x334c8
#define ixDPM_TABLE_125 0 x334cc
#define ixDPM_TABLE_126 0 x334d0
#define ixDPM_TABLE_127 0 x334d4
#define ixDPM_TABLE_128 0 x334d8
#define ixDPM_TABLE_129 0 x334dc
#define ixDPM_TABLE_130 0 x334e0
#define ixDPM_TABLE_131 0 x334e4
#define ixDPM_TABLE_132 0 x334e8
#define ixDPM_TABLE_133 0 x334ec
#define ixDPM_TABLE_134 0 x334f0
#define ixDPM_TABLE_135 0 x334f4
#define ixDPM_TABLE_136 0 x334f8
#define ixDPM_TABLE_137 0 x334fc
#define ixDPM_TABLE_138 0 x33500
#define ixDPM_TABLE_139 0 x33504
#define ixDPM_TABLE_140 0 x33508
#define ixDPM_TABLE_141 0 x3350c
#define ixDPM_TABLE_142 0 x33510
#define ixDPM_TABLE_143 0 x33514
#define ixDPM_TABLE_144 0 x33518
#define ixDPM_TABLE_145 0 x3351c
#define ixDPM_TABLE_146 0 x33520
#define ixDPM_TABLE_147 0 x33524
#define ixDPM_TABLE_148 0 x33528
#define ixDPM_TABLE_149 0 x3352c
#define ixDPM_TABLE_150 0 x33530
#define ixDPM_TABLE_151 0 x33534
#define ixDPM_TABLE_152 0 x33538
#define ixDPM_TABLE_153 0 x3353c
#define ixDPM_TABLE_154 0 x33540
#define ixDPM_TABLE_155 0 x33544
#define ixDPM_TABLE_156 0 x33548
#define ixDPM_TABLE_157 0 x3354c
#define ixDPM_TABLE_158 0 x33550
#define ixDPM_TABLE_159 0 x33554
#define ixDPM_TABLE_160 0 x33558
#define ixDPM_TABLE_161 0 x3355c
#define ixDPM_TABLE_162 0 x33560
#define ixDPM_TABLE_163 0 x33564
#define ixDPM_TABLE_164 0 x33568
#define ixDPM_TABLE_165 0 x3356c
#define ixDPM_TABLE_166 0 x33570
#define ixDPM_TABLE_167 0 x33574
#define ixDPM_TABLE_168 0 x33578
#define ixDPM_TABLE_169 0 x3357c
#define ixDPM_TABLE_170 0 x33580
#define ixDPM_TABLE_171 0 x33584
#define ixDPM_TABLE_172 0 x33588
#define ixDPM_TABLE_173 0 x3358c
#define ixDPM_TABLE_174 0 x33590
#define ixDPM_TABLE_175 0 x33594
#define ixDPM_TABLE_176 0 x33598
#define ixDPM_TABLE_177 0 x3359c
#define ixDPM_TABLE_178 0 x335a0
#define ixDPM_TABLE_179 0 x335a4
#define ixDPM_TABLE_180 0 x335a8
#define ixDPM_TABLE_181 0 x335ac
#define ixDPM_TABLE_182 0 x335b0
#define ixDPM_TABLE_183 0 x335b4
#define ixDPM_TABLE_184 0 x335b8
#define ixDPM_TABLE_185 0 x335bc
#define ixDPM_TABLE_186 0 x335c0
#define ixDPM_TABLE_187 0 x335c4
#define ixDPM_TABLE_188 0 x335c8
#define ixDPM_TABLE_189 0 x335cc
#define ixDPM_TABLE_190 0 x335d0
#define ixDPM_TABLE_191 0 x335d4
#define ixDPM_TABLE_192 0 x335d8
#define ixDPM_TABLE_193 0 x335dc
#define ixDPM_TABLE_194 0 x335e0
#define ixDPM_TABLE_195 0 x335e4
#define ixDPM_TABLE_196 0 x335e8
#define ixDPM_TABLE_197 0 x335ec
#define ixDPM_TABLE_198 0 x335f0
#define ixDPM_TABLE_199 0 x335f4
#define ixDPM_TABLE_200 0 x335f8
#define ixDPM_TABLE_201 0 x335fc
#define ixDPM_TABLE_202 0 x33600
#define ixDPM_TABLE_203 0 x33604
#define ixDPM_TABLE_204 0 x33608
#define ixDPM_TABLE_205 0 x3360c
#define ixDPM_TABLE_206 0 x33610
#define ixDPM_TABLE_207 0 x33614
#define ixDPM_TABLE_208 0 x33618
#define ixDPM_TABLE_209 0 x3361c
#define ixDPM_TABLE_210 0 x33620
#define ixDPM_TABLE_211 0 x33624
#define ixDPM_TABLE_212 0 x33628
#define ixDPM_TABLE_213 0 x3362c
#define ixDPM_TABLE_214 0 x33630
#define ixDPM_TABLE_215 0 x33634
#define ixDPM_TABLE_216 0 x33638
#define ixDPM_TABLE_217 0 x3363c
#define ixDPM_TABLE_218 0 x33640
#define ixDPM_TABLE_219 0 x33644
#define ixDPM_TABLE_220 0 x33648
#define ixDPM_TABLE_221 0 x3364c
#define ixDPM_TABLE_222 0 x33650
#define ixDPM_TABLE_223 0 x33654
#define ixDPM_TABLE_224 0 x33658
#define ixDPM_TABLE_225 0 x3365c
#define ixDPM_TABLE_226 0 x33660
#define ixDPM_TABLE_227 0 x33664
#define ixDPM_TABLE_228 0 x33668
#define ixDPM_TABLE_229 0 x3366c
#define ixDPM_TABLE_230 0 x33670
#define ixDPM_TABLE_231 0 x33674
#define ixDPM_TABLE_232 0 x33678
#define ixDPM_TABLE_233 0 x3367c
#define ixDPM_TABLE_234 0 x33680
#define ixDPM_TABLE_235 0 x33684
#define ixDPM_TABLE_236 0 x33688
#define ixDPM_TABLE_237 0 x3368c
#define ixDPM_TABLE_238 0 x33690
#define ixDPM_TABLE_239 0 x33694
#define ixDPM_TABLE_240 0 x33698
#define ixDPM_TABLE_241 0 x3369c
#define ixDPM_TABLE_242 0 x336a0
#define ixDPM_TABLE_243 0 x336a4
#define ixDPM_TABLE_244 0 x336a8
#define ixDPM_TABLE_245 0 x336ac
#define ixDPM_TABLE_246 0 x336b0
#define ixDPM_TABLE_247 0 x336b4
#define ixDPM_TABLE_248 0 x336b8
#define ixDPM_TABLE_249 0 x336bc
#define ixDPM_TABLE_250 0 x336c0
#define ixDPM_TABLE_251 0 x336c4
#define ixDPM_TABLE_252 0 x336c8
#define ixDPM_TABLE_253 0 x336cc
#define ixDPM_TABLE_254 0 x336d0
#define ixDPM_TABLE_255 0 x336d4
#define ixDPM_TABLE_256 0 x336d8
#define ixDPM_TABLE_257 0 x336dc
#define ixDPM_TABLE_258 0 x336e0
#define ixDPM_TABLE_259 0 x336e4
#define ixDPM_TABLE_260 0 x336e8
#define ixDPM_TABLE_261 0 x336ec
#define ixDPM_TABLE_262 0 x336f0
#define ixDPM_TABLE_263 0 x336f4
#define ixDPM_TABLE_264 0 x336f8
#define ixDPM_TABLE_265 0 x336fc
#define ixDPM_TABLE_266 0 x33700
#define ixDPM_TABLE_267 0 x33704
#define ixDPM_TABLE_268 0 x33708
#define ixDPM_TABLE_269 0 x3370c
#define ixDPM_TABLE_270 0 x33710
#define ixDPM_TABLE_271 0 x33714
#define ixDPM_TABLE_272 0 x33718
#define ixDPM_TABLE_273 0 x3371c
#define ixDPM_TABLE_274 0 x33720
#define ixDPM_TABLE_275 0 x33724
#define ixDPM_TABLE_276 0 x33728
#define ixDPM_TABLE_277 0 x3372c
#define ixDPM_TABLE_278 0 x33730
#define ixDPM_TABLE_279 0 x33734
#define ixDPM_TABLE_280 0 x33738
#define ixDPM_TABLE_281 0 x3373c
#define ixDPM_TABLE_282 0 x33740
#define ixDPM_TABLE_283 0 x33744
#define ixDPM_TABLE_284 0 x33748
#define ixDPM_TABLE_285 0 x3374c
#define ixDPM_TABLE_286 0 x33750
#define ixDPM_TABLE_287 0 x33754
#define ixDPM_TABLE_288 0 x33758
#define ixDPM_TABLE_289 0 x3375c
#define ixDPM_TABLE_290 0 x33760
#define ixDPM_TABLE_291 0 x33764
#define ixDPM_TABLE_292 0 x33768
#define ixDPM_TABLE_293 0 x3376c
#define ixDPM_TABLE_294 0 x33770
#define ixDPM_TABLE_295 0 x33774
#define ixDPM_TABLE_296 0 x33778
#define ixDPM_TABLE_297 0 x3377c
#define ixDPM_TABLE_298 0 x33780
#define ixDPM_TABLE_299 0 x33784
#define ixDPM_TABLE_300 0 x33788
#define ixDPM_TABLE_301 0 x3378c
#define ixDPM_TABLE_302 0 x33790
#define ixDPM_TABLE_303 0 x33794
#define ixDPM_TABLE_304 0 x33798
#define ixDPM_TABLE_305 0 x3379c
#define ixDPM_TABLE_306 0 x337a0
#define ixDPM_TABLE_307 0 x337a4
#define ixDPM_TABLE_308 0 x337a8
#define ixDPM_TABLE_309 0 x337ac
#define ixDPM_TABLE_310 0 x337b0
#define ixDPM_TABLE_311 0 x337b4
#define ixDPM_TABLE_312 0 x337b8
#define ixDPM_TABLE_313 0 x337bc
#define ixDPM_TABLE_314 0 x337c0
#define ixDPM_TABLE_315 0 x337c4
#define ixDPM_TABLE_316 0 x337c8
#define ixDPM_TABLE_317 0 x337cc
#define ixDPM_TABLE_318 0 x337d0
#define ixDPM_TABLE_319 0 x337d4
#define ixDPM_TABLE_320 0 x337d8
#define ixDPM_TABLE_321 0 x337dc
#define ixDPM_TABLE_322 0 x337e0
#define ixDPM_TABLE_323 0 x337e4
#define ixDPM_TABLE_324 0 x337e8
#define ixDPM_TABLE_325 0 x337ec
#define ixDPM_TABLE_326 0 x337f0
#define ixDPM_TABLE_327 0 x337f4
#define ixDPM_TABLE_328 0 x337f8
#define ixDPM_TABLE_329 0 x337fc
#define ixDPM_TABLE_330 0 x33800
#define ixDPM_TABLE_331 0 x33804
#define ixDPM_TABLE_332 0 x33808
#define ixDPM_TABLE_333 0 x3380c
#define ixDPM_TABLE_334 0 x33810
#define ixDPM_TABLE_335 0 x33814
#define ixDPM_TABLE_336 0 x33818
#define ixDPM_TABLE_337 0 x3381c
#define ixDPM_TABLE_338 0 x33820
#define ixDPM_TABLE_339 0 x33824
#define ixDPM_TABLE_340 0 x33828
#define ixDPM_TABLE_341 0 x3382c
#define ixDPM_TABLE_342 0 x33830
#define ixDPM_TABLE_343 0 x33834
#define ixDPM_TABLE_344 0 x33838
#define ixDPM_TABLE_345 0 x3383c
#define ixDPM_TABLE_346 0 x33840
#define ixDPM_TABLE_347 0 x33844
#define ixDPM_TABLE_348 0 x33848
#define ixDPM_TABLE_349 0 x3384c
#define ixDPM_TABLE_350 0 x33850
#define ixDPM_TABLE_351 0 x33854
#define ixDPM_TABLE_352 0 x33858
#define ixDPM_TABLE_353 0 x3385c
#define ixDPM_TABLE_354 0 x33860
#define ixDPM_TABLE_355 0 x33864
#define ixDPM_TABLE_356 0 x33868
#define ixDPM_TABLE_357 0 x3386c
#define ixDPM_TABLE_358 0 x33870
#define ixDPM_TABLE_359 0 x33874
#define ixDPM_TABLE_360 0 x33878
#define ixDPM_TABLE_361 0 x3387c
#define ixDPM_TABLE_362 0 x33880
#define ixDPM_TABLE_363 0 x33884
#define ixDPM_TABLE_364 0 x33888
#define ixDPM_TABLE_365 0 x3388c
#define ixDPM_TABLE_366 0 x33890
#define ixDPM_TABLE_367 0 x33894
#define ixDPM_TABLE_368 0 x33898
#define ixDPM_TABLE_369 0 x3389c
#define ixDPM_TABLE_370 0 x338a0
#define ixSOFT_REGISTERS_TABLE_1 0 x338c8
#define ixSOFT_REGISTERS_TABLE_2 0 x338cc
#define ixSOFT_REGISTERS_TABLE_3 0 x338d0
#define ixSOFT_REGISTERS_TABLE_4 0 x338d4
#define ixSOFT_REGISTERS_TABLE_5 0 x338d8
#define ixSOFT_REGISTERS_TABLE_6 0 x338dc
#define ixSOFT_REGISTERS_TABLE_7 0 x338e0
#define ixSOFT_REGISTERS_TABLE_8 0 x338e4
#define ixSOFT_REGISTERS_TABLE_9 0 x338e8
#define ixSOFT_REGISTERS_TABLE_10 0 x338ec
#define ixSOFT_REGISTERS_TABLE_11 0 x338f0
#define ixSOFT_REGISTERS_TABLE_12 0 x338f4
#define ixSOFT_REGISTERS_TABLE_13 0 x338f8
#define ixSOFT_REGISTERS_TABLE_14 0 x338fc
#define ixSOFT_REGISTERS_TABLE_15 0 x33900
#define ixSOFT_REGISTERS_TABLE_16 0 x33904
#define ixSOFT_REGISTERS_TABLE_17 0 x33908
#define ixSOFT_REGISTERS_TABLE_18 0 x3390c
#define ixSOFT_REGISTERS_TABLE_19 0 x33910
#define ixSOFT_REGISTERS_TABLE_20 0 x33914
#define ixSOFT_REGISTERS_TABLE_21 0 x33918
#define ixSOFT_REGISTERS_TABLE_22 0 x3391c
#define ixSOFT_REGISTERS_TABLE_23 0 x33920
#define ixSOFT_REGISTERS_TABLE_24 0 x33924
#define ixSOFT_REGISTERS_TABLE_25 0 x33928
#define ixSOFT_REGISTERS_TABLE_26 0 x3392c
#define ixSOFT_REGISTERS_TABLE_27 0 x33930
#define ixSOFT_REGISTERS_TABLE_28 0 x33934
#define ixSOFT_REGISTERS_TABLE_29 0 x33938
#define ixFIRMWARE_FLAGS 0 x33000
#define ixTDC_STATUS 0 x33004
#define ixTDC_MV_AVERAGE 0 x33008
#define ixTDC_VRM_LIMIT 0 x3300c
#define ixFEATURE_STATUS 0 x33010
#define ixENTITY_TEMPERATURES_1 0 x33014
#define ixPM_FUSES_1 0 x3394c
#define ixPM_FUSES_2 0 x33950
#define ixPM_FUSES_3 0 x33954
#define ixPM_FUSES_4 0 x33958
#define ixPM_FUSES_5 0 x3395c
#define ixPM_FUSES_6 0 x33960
#define ixPM_FUSES_7 0 x33964
#define ixPM_FUSES_8 0 x33968
#define ixPM_FUSES_9 0 x3396c
#define ixPM_FUSES_10 0 x33970
#define ixPM_FUSES_11 0 x33974
#define ixPM_FUSES_12 0 x33978
#define ixPM_FUSES_13 0 x3397c
#define ixPM_FUSES_14 0 x33980
#define ixPM_FUSES_15 0 x33984
#define ixPM_FUSES_16 0 x33988
#define ixPM_FUSES_17 0 x3398c
#define ixPM_FUSES_18 0 x33990
#define ixPM_FUSES_19 0 x33994
#define ixPM_FUSES_20 0 x33998
#define ixPM_FUSES_21 0 x3399c
#define ixSMU_PM_STATUS_0 0 x33e00
#define ixSMU_PM_STATUS_1 0 x33e04
#define ixSMU_PM_STATUS_2 0 x33e08
#define ixSMU_PM_STATUS_3 0 x33e0c
#define ixSMU_PM_STATUS_4 0 x33e10
#define ixSMU_PM_STATUS_5 0 x33e14
#define ixSMU_PM_STATUS_6 0 x33e18
#define ixSMU_PM_STATUS_7 0 x33e1c
#define ixSMU_PM_STATUS_8 0 x33e20
#define ixSMU_PM_STATUS_9 0 x33e24
#define ixSMU_PM_STATUS_10 0 x33e28
#define ixSMU_PM_STATUS_11 0 x33e2c
#define ixSMU_PM_STATUS_12 0 x33e30
#define ixSMU_PM_STATUS_13 0 x33e34
#define ixSMU_PM_STATUS_14 0 x33e38
#define ixSMU_PM_STATUS_15 0 x33e3c
#define ixSMU_PM_STATUS_16 0 x33e40
#define ixSMU_PM_STATUS_17 0 x33e44
#define ixSMU_PM_STATUS_18 0 x33e48
#define ixSMU_PM_STATUS_19 0 x33e4c
#define ixSMU_PM_STATUS_20 0 x33e50
#define ixSMU_PM_STATUS_21 0 x33e54
#define ixSMU_PM_STATUS_22 0 x33e58
#define ixSMU_PM_STATUS_23 0 x33e5c
#define ixSMU_PM_STATUS_24 0 x33e60
#define ixSMU_PM_STATUS_25 0 x33e64
#define ixSMU_PM_STATUS_26 0 x33e68
#define ixSMU_PM_STATUS_27 0 x33e6c
#define ixSMU_PM_STATUS_28 0 x33e70
#define ixSMU_PM_STATUS_29 0 x33e74
#define ixSMU_PM_STATUS_30 0 x33e78
#define ixSMU_PM_STATUS_31 0 x33e7c
#define ixSMU_PM_STATUS_32 0 x33e80
#define ixSMU_PM_STATUS_33 0 x33e84
#define ixSMU_PM_STATUS_34 0 x33e88
#define ixSMU_PM_STATUS_35 0 x33e8c
#define ixSMU_PM_STATUS_36 0 x33e90
#define ixSMU_PM_STATUS_37 0 x33e94
#define ixSMU_PM_STATUS_38 0 x33e98
#define ixSMU_PM_STATUS_39 0 x33e9c
#define ixSMU_PM_STATUS_40 0 x33ea0
#define ixSMU_PM_STATUS_41 0 x33ea4
#define ixSMU_PM_STATUS_42 0 x33ea8
#define ixSMU_PM_STATUS_43 0 x33eac
#define ixSMU_PM_STATUS_44 0 x33eb0
#define ixSMU_PM_STATUS_45 0 x33eb4
#define ixSMU_PM_STATUS_46 0 x33eb8
#define ixSMU_PM_STATUS_47 0 x33ebc
#define ixSMU_PM_STATUS_48 0 x33ec0
#define ixSMU_PM_STATUS_49 0 x33ec4
#define ixSMU_PM_STATUS_50 0 x33ec8
#define ixSMU_PM_STATUS_51 0 x33ecc
#define ixSMU_PM_STATUS_52 0 x33ed0
#define ixSMU_PM_STATUS_53 0 x33ed4
#define ixSMU_PM_STATUS_54 0 x33ed8
#define ixSMU_PM_STATUS_55 0 x33edc
#define ixSMU_PM_STATUS_56 0 x33ee0
#define ixSMU_PM_STATUS_57 0 x33ee4
#define ixSMU_PM_STATUS_58 0 x33ee8
#define ixSMU_PM_STATUS_59 0 x33eec
#define ixSMU_PM_STATUS_60 0 x33ef0
#define ixSMU_PM_STATUS_61 0 x33ef4
#define ixSMU_PM_STATUS_62 0 x33ef8
#define ixSMU_PM_STATUS_63 0 x33efc
#define ixSMU_PM_STATUS_64 0 x33f00
#define ixSMU_PM_STATUS_65 0 x33f04
#define ixSMU_PM_STATUS_66 0 x33f08
#define ixSMU_PM_STATUS_67 0 x33f0c
#define ixSMU_PM_STATUS_68 0 x33f10
#define ixSMU_PM_STATUS_69 0 x33f14
#define ixSMU_PM_STATUS_70 0 x33f18
#define ixSMU_PM_STATUS_71 0 x33f1c
#define ixSMU_PM_STATUS_72 0 x33f20
#define ixSMU_PM_STATUS_73 0 x33f24
#define ixSMU_PM_STATUS_74 0 x33f28
#define ixSMU_PM_STATUS_75 0 x33f2c
#define ixSMU_PM_STATUS_76 0 x33f30
#define ixSMU_PM_STATUS_77 0 x33f34
#define ixSMU_PM_STATUS_78 0 x33f38
#define ixSMU_PM_STATUS_79 0 x33f3c
#define ixSMU_PM_STATUS_80 0 x33f40
#define ixSMU_PM_STATUS_81 0 x33f44
#define ixSMU_PM_STATUS_82 0 x33f48
#define ixSMU_PM_STATUS_83 0 x33f4c
#define ixSMU_PM_STATUS_84 0 x33f50
#define ixSMU_PM_STATUS_85 0 x33f54
#define ixSMU_PM_STATUS_86 0 x33f58
#define ixSMU_PM_STATUS_87 0 x33f5c
#define ixSMU_PM_STATUS_88 0 x33f60
#define ixSMU_PM_STATUS_89 0 x33f64
#define ixSMU_PM_STATUS_90 0 x33f68
#define ixSMU_PM_STATUS_91 0 x33f6c
#define ixSMU_PM_STATUS_92 0 x33f70
#define ixSMU_PM_STATUS_93 0 x33f74
#define ixSMU_PM_STATUS_94 0 x33f78
#define ixSMU_PM_STATUS_95 0 x33f7c
#define ixSMU_PM_STATUS_96 0 x33f80
#define ixSMU_PM_STATUS_97 0 x33f84
#define ixSMU_PM_STATUS_98 0 x33f88
#define ixSMU_PM_STATUS_99 0 x33f8c
#define ixSMU_PM_STATUS_100 0 x33f90
#define ixSMU_PM_STATUS_101 0 x33f94
#define ixSMU_PM_STATUS_102 0 x33f98
#define ixSMU_PM_STATUS_103 0 x33f9c
#define ixSMU_PM_STATUS_104 0 x33fa0
#define ixSMU_PM_STATUS_105 0 x33fa4
#define ixSMU_PM_STATUS_106 0 x33fa8
#define ixSMU_PM_STATUS_107 0 x33fac
#define ixSMU_PM_STATUS_108 0 x33fb0
#define ixSMU_PM_STATUS_109 0 x33fb4
#define ixSMU_PM_STATUS_110 0 x33fb8
#define ixSMU_PM_STATUS_111 0 x33fbc
#define ixSMU_PM_STATUS_112 0 x33fc0
#define ixSMU_PM_STATUS_113 0 x33fc4
#define ixSMU_PM_STATUS_114 0 x33fc8
#define ixSMU_PM_STATUS_115 0 x33fcc
#define ixSMU_PM_STATUS_116 0 x33fd0
#define ixSMU_PM_STATUS_117 0 x33fd4
#define ixSMU_PM_STATUS_118 0 x33fd8
#define ixSMU_PM_STATUS_119 0 x33fdc
#define ixSMU_PM_STATUS_120 0 x33fe0
#define ixSMU_PM_STATUS_121 0 x33fe4
#define ixSMU_PM_STATUS_122 0 x33fe8
#define ixSMU_PM_STATUS_123 0 x33fec
#define ixSMU_PM_STATUS_124 0 x33ff0
#define ixSMU_PM_STATUS_125 0 x33ff4
#define ixSMU_PM_STATUS_126 0 x33ff8
#define ixSMU_PM_STATUS_127 0 x33ffc
#define ixCG_THERMAL_INT_ENA 0 xc2100024
#define ixCG_THERMAL_INT_CTRL 0 xc2100028
#define ixCG_THERMAL_INT_STATUS 0 xc210002c
#define ixCG_THERMAL_CTRL 0 xc0300004
#define ixCG_THERMAL_STATUS 0 xc0300008
#define ixCG_THERMAL_INT 0 xc030000c
#define ixCG_MULT_THERMAL_CTRL 0 xc0300010
#define ixCG_MULT_THERMAL_STATUS 0 xc0300014
#define ixCG_FDO_CTRL0 0 xc0300064
#define ixCG_FDO_CTRL1 0 xc0300068
#define ixCG_FDO_CTRL2 0 xc030006c
#define ixCG_TACH_CTRL 0 xc0300070
#define ixCG_TACH_STATUS 0 xc0300074
#define ixCC_THM_STRAPS0 0 xc0300080
#define ixTHM_TMON0_RDIL0_DATA 0 xc0300100
#define ixTHM_TMON0_RDIL1_DATA 0 xc0300104
#define ixTHM_TMON0_RDIL2_DATA 0 xc0300108
#define ixTHM_TMON0_RDIL3_DATA 0 xc030010c
#define ixTHM_TMON0_RDIL4_DATA 0 xc0300110
#define ixTHM_TMON0_RDIL5_DATA 0 xc0300114
#define ixTHM_TMON0_RDIL6_DATA 0 xc0300118
#define ixTHM_TMON0_RDIL7_DATA 0 xc030011c
#define ixTHM_TMON0_RDIL8_DATA 0 xc0300120
#define ixTHM_TMON0_RDIL9_DATA 0 xc0300124
#define ixTHM_TMON0_RDIL10_DATA 0 xc0300128
#define ixTHM_TMON0_RDIL11_DATA 0 xc030012c
#define ixTHM_TMON0_RDIL12_DATA 0 xc0300130
#define ixTHM_TMON0_RDIL13_DATA 0 xc0300134
#define ixTHM_TMON0_RDIL14_DATA 0 xc0300138
#define ixTHM_TMON0_RDIL15_DATA 0 xc030013c
#define ixTHM_TMON0_RDIR0_DATA 0 xc0300140
#define ixTHM_TMON0_RDIR1_DATA 0 xc0300144
#define ixTHM_TMON0_RDIR2_DATA 0 xc0300148
#define ixTHM_TMON0_RDIR3_DATA 0 xc030014c
#define ixTHM_TMON0_RDIR4_DATA 0 xc0300150
#define ixTHM_TMON0_RDIR5_DATA 0 xc0300154
#define ixTHM_TMON0_RDIR6_DATA 0 xc0300158
#define ixTHM_TMON0_RDIR7_DATA 0 xc030015c
#define ixTHM_TMON0_RDIR8_DATA 0 xc0300160
#define ixTHM_TMON0_RDIR9_DATA 0 xc0300164
#define ixTHM_TMON0_RDIR10_DATA 0 xc0300168
#define ixTHM_TMON0_RDIR11_DATA 0 xc030016c
#define ixTHM_TMON0_RDIR12_DATA 0 xc0300170
#define ixTHM_TMON0_RDIR13_DATA 0 xc0300174
#define ixTHM_TMON0_RDIR14_DATA 0 xc0300178
#define ixTHM_TMON0_RDIR15_DATA 0 xc030017c
#define ixTHM_TMON0_INT_DATA 0 xc0300300
#define ixTHM_TMON0_DEBUG 0 xc0300310
#define ixTHM_TMON0_STATUS 0 xc0300320
#define ixGENERAL_PWRMGT 0 xc0200000
#define ixCNB_PWRMGT_CNTL 0 xc0200004
#define ixSCLK_PWRMGT_CNTL 0 xc0200008
#define ixTARGET_AND_CURRENT_PROFILE_INDEX 0 xc0200014
#define ixPWR_PCC_CONTROL 0 xc0200018
#define ixPWR_PCC_GPIO_SELECT 0 xc020001c
#define ixCG_FREQ_TRAN_VOTING_0 0 xc02001a8
#define ixCG_FREQ_TRAN_VOTING_1 0 xc02001ac
#define ixCG_FREQ_TRAN_VOTING_2 0 xc02001b0
#define ixCG_FREQ_TRAN_VOTING_3 0 xc02001b4
#define ixCG_FREQ_TRAN_VOTING_4 0 xc02001b8
#define ixCG_FREQ_TRAN_VOTING_5 0 xc02001bc
#define ixCG_FREQ_TRAN_VOTING_6 0 xc02001c0
#define ixCG_FREQ_TRAN_VOTING_7 0 xc02001c4
#define ixPLL_TEST_CNTL 0 xc020003c
#define ixCG_STATIC_SCREEN_PARAMETER 0 xc0200044
#define ixCG_DISPLAY_GAP_CNTL 0 xc0200060
#define ixCG_DISPLAY_GAP_CNTL2 0 xc0200230
#define ixCG_ACPI_CNTL 0 xc0200064
#define ixSCLK_DEEP_SLEEP_CNTL 0 xc0200080
#define ixSCLK_DEEP_SLEEP_CNTL2 0 xc0200084
#define ixSCLK_DEEP_SLEEP_CNTL3 0 xc020009c
#define ixSCLK_DEEP_SLEEP_MISC_CNTL 0 xc0200088
#define ixLCLK_DEEP_SLEEP_CNTL 0 xc020008c
#define ixLCLK_DEEP_SLEEP_CNTL2 0 xc0200310
#define ixTARGET_AND_CURRENT_PROFILE_INDEX_1 0 xc02000f0
#define ixCG_ULV_PARAMETER 0 xc020015c
#define ixSCLK_MIN_DIV 0 xc02003ac
#define ixPWR_DISP_TIMER_0_CONTROL 0 xc0200390
#define ixPWR_DISP_TIMER_1_CONTROL 0 xc020037c
#define ixPWR_DISP_TIMER_2_CONTROL 0 xc02003d0
#define ixPWR_DISP_TIMER_3_CONTROL 0 xc02003d4
#define ixPWR_DISP_TIMER_4_CONTROL 0 xc02003d8
#define ixPWR_DISP_TIMER_5_CONTROL 0 xc02003dc
#define ixPWR_DISP_TIMER_6_CONTROL 0 xc02003e0
#define ixPWR_DISP_TIMER_7_CONTROL 0 xc02003e4
#define ixPWR_DISP_TIMER_8_CONTROL 0 xc02003e8
#define ixPWR_DISP_TIMER_9_CONTROL 0 xc02003ec
#define ixPWR_DISP_TIMER_10_CONTROL 0 xc02003f0
#define ixPWR_DISP_TIMER_11_CONTROL 0 xc02003f4
#define ixPWR_DISP_TIMER_12_CONTROL 0 xc02003f8
#define ixPWR_DISP_TIMER_13_CONTROL 0 xc02003fc
#define ixPWR_DISP_TIMER_14_CONTROL 0 xc0200074
#define ixPWR_DISP_TIMER_15_CONTROL 0 xc0200078
#define ixPWR_DISP_TIMER_CONTROL2 0 xc0200378
#define ixVDDGFX_IDLE_PARAMETER 0 xc020036c
#define ixVDDGFX_IDLE_CONTROL 0 xc0200370
#define ixVDDGFX_IDLE_EXIT 0 xc0200374
#define ixLCAC_MC0_CNTL 0 xc0400130
#define ixLCAC_MC0_OVR_SEL 0 xc0400134
#define ixLCAC_MC0_OVR_VAL 0 xc0400138
#define ixLCAC_MC1_CNTL 0 xc040013c
#define ixLCAC_MC1_OVR_SEL 0 xc0400140
#define ixLCAC_MC1_OVR_VAL 0 xc0400144
#define ixLCAC_MC2_CNTL 0 xc0400148
#define ixLCAC_MC2_OVR_SEL 0 xc040014c
#define ixLCAC_MC2_OVR_VAL 0 xc0400150
#define ixLCAC_MC3_CNTL 0 xc0400154
#define ixLCAC_MC3_OVR_SEL 0 xc0400158
#define ixLCAC_MC3_OVR_VAL 0 xc040015c
#define ixLCAC_CPL_CNTL 0 xc0400160
#define ixLCAC_CPL_OVR_SEL 0 xc0400164
#define ixLCAC_CPL_OVR_VAL 0 xc0400168
#define mmROM_SMC_IND_INDEX 0 x80
#define mmROM0_ROM_SMC_IND_INDEX 0 x80
#define mmROM1_ROM_SMC_IND_INDEX 0 x82
#define mmROM2_ROM_SMC_IND_INDEX 0 x84
#define mmROM3_ROM_SMC_IND_INDEX 0 x86
#define mmROM_SMC_IND_DATA 0 x81
#define mmROM0_ROM_SMC_IND_DATA 0 x81
#define mmROM1_ROM_SMC_IND_DATA 0 x83
#define mmROM2_ROM_SMC_IND_DATA 0 x85
#define mmROM3_ROM_SMC_IND_DATA 0 x87
#define ixROM_CNTL 0 xc0600000
#define ixPAGE_MIRROR_CNTL 0 xc0600004
#define ixROM_STATUS 0 xc0600008
#define ixCGTT_ROM_CLK_CTRL0 0 xc060000c
#define ixROM_INDEX 0 xc0600010
#define ixROM_DATA 0 xc0600014
#define ixROM_START 0 xc0600018
#define ixROM_SW_CNTL 0 xc060001c
#define ixROM_SW_STATUS 0 xc0600020
#define ixROM_SW_COMMAND 0 xc0600024
#define ixROM_SW_DATA_1 0 xc0600028
#define ixROM_SW_DATA_2 0 xc060002c
#define ixROM_SW_DATA_3 0 xc0600030
#define ixROM_SW_DATA_4 0 xc0600034
#define ixROM_SW_DATA_5 0 xc0600038
#define ixROM_SW_DATA_6 0 xc060003c
#define ixROM_SW_DATA_7 0 xc0600040
#define ixROM_SW_DATA_8 0 xc0600044
#define ixROM_SW_DATA_9 0 xc0600048
#define ixROM_SW_DATA_10 0 xc060004c
#define ixROM_SW_DATA_11 0 xc0600050
#define ixROM_SW_DATA_12 0 xc0600054
#define ixROM_SW_DATA_13 0 xc0600058
#define ixROM_SW_DATA_14 0 xc060005c
#define ixROM_SW_DATA_15 0 xc0600060
#define ixROM_SW_DATA_16 0 xc0600064
#define ixROM_SW_DATA_17 0 xc0600068
#define ixROM_SW_DATA_18 0 xc060006c
#define ixROM_SW_DATA_19 0 xc0600070
#define ixROM_SW_DATA_20 0 xc0600074
#define ixROM_SW_DATA_21 0 xc0600078
#define ixROM_SW_DATA_22 0 xc060007c
#define ixROM_SW_DATA_23 0 xc0600080
#define ixROM_SW_DATA_24 0 xc0600084
#define ixROM_SW_DATA_25 0 xc0600088
#define ixROM_SW_DATA_26 0 xc060008c
#define ixROM_SW_DATA_27 0 xc0600090
#define ixROM_SW_DATA_28 0 xc0600094
#define ixROM_SW_DATA_29 0 xc0600098
#define ixROM_SW_DATA_30 0 xc060009c
#define ixROM_SW_DATA_31 0 xc06000a0
#define ixROM_SW_DATA_32 0 xc06000a4
#define ixROM_SW_DATA_33 0 xc06000a8
#define ixROM_SW_DATA_34 0 xc06000ac
#define ixROM_SW_DATA_35 0 xc06000b0
#define ixROM_SW_DATA_36 0 xc06000b4
#define ixROM_SW_DATA_37 0 xc06000b8
#define ixROM_SW_DATA_38 0 xc06000bc
#define ixROM_SW_DATA_39 0 xc06000c0
#define ixROM_SW_DATA_40 0 xc06000c4
#define ixROM_SW_DATA_41 0 xc06000c8
#define ixROM_SW_DATA_42 0 xc06000cc
#define ixROM_SW_DATA_43 0 xc06000d0
#define ixROM_SW_DATA_44 0 xc06000d4
#define ixROM_SW_DATA_45 0 xc06000d8
#define ixROM_SW_DATA_46 0 xc06000dc
#define ixROM_SW_DATA_47 0 xc06000e0
#define ixROM_SW_DATA_48 0 xc06000e4
#define ixROM_SW_DATA_49 0 xc06000e8
#define ixROM_SW_DATA_50 0 xc06000ec
#define ixROM_SW_DATA_51 0 xc06000f0
#define ixROM_SW_DATA_52 0 xc06000f4
#define ixROM_SW_DATA_53 0 xc06000f8
#define ixROM_SW_DATA_54 0 xc06000fc
#define ixROM_SW_DATA_55 0 xc0600100
#define ixROM_SW_DATA_56 0 xc0600104
#define ixROM_SW_DATA_57 0 xc0600108
#define ixROM_SW_DATA_58 0 xc060010c
#define ixROM_SW_DATA_59 0 xc0600110
#define ixROM_SW_DATA_60 0 xc0600114
#define ixROM_SW_DATA_61 0 xc0600118
#define ixROM_SW_DATA_62 0 xc060011c
#define ixROM_SW_DATA_63 0 xc0600120
#define ixROM_SW_DATA_64 0 xc0600124
#define ixCURRENT_PG_STATUS 0 xc020029c
#endif /* SMU_7_1_1_D_H */
Messung V0.5 in Prozent C=83 H=96 G=89
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