/*
* GFX_8_0 Register documentation
*
* Copyright (C) 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef GFX_8_0_D_H
#define GFX_8_0_D_H
#define mmCB_BLEND_RED 0xa105
#define mmCB_BLEND_GREEN 0xa106
#define mmCB_BLEND_BLUE 0xa107
#define mmCB_BLEND_ALPHA 0xa108
#define mmCB_DCC_CONTROL 0xa109
#define mmCB_COLOR_CONTROL 0xa202
#define mmCB_BLEND0_CONTROL 0xa1e0
#define mmCB_BLEND1_CONTROL 0xa1e1
#define mmCB_BLEND2_CONTROL 0xa1e2
#define mmCB_BLEND3_CONTROL 0xa1e3
#define mmCB_BLEND4_CONTROL 0xa1e4
#define mmCB_BLEND5_CONTROL 0xa1e5
#define mmCB_BLEND6_CONTROL 0xa1e6
#define mmCB_BLEND7_CONTROL 0xa1e7
#define mmCB_COLOR0_BASE 0xa318
#define mmCB_COLOR1_BASE 0xa327
#define mmCB_COLOR2_BASE 0xa336
#define mmCB_COLOR3_BASE 0xa345
#define mmCB_COLOR4_BASE 0xa354
#define mmCB_COLOR5_BASE 0xa363
#define mmCB_COLOR6_BASE 0xa372
#define mmCB_COLOR7_BASE 0xa381
#define mmCB_COLOR0_PITCH 0xa319
#define mmCB_COLOR1_PITCH 0xa328
#define mmCB_COLOR2_PITCH 0xa337
#define mmCB_COLOR3_PITCH 0xa346
#define mmCB_COLOR4_PITCH 0xa355
#define mmCB_COLOR5_PITCH 0xa364
#define mmCB_COLOR6_PITCH 0xa373
#define mmCB_COLOR7_PITCH 0xa382
#define mmCB_COLOR0_SLICE 0xa31a
#define mmCB_COLOR1_SLICE 0xa329
#define mmCB_COLOR2_SLICE 0xa338
#define mmCB_COLOR3_SLICE 0xa347
#define mmCB_COLOR4_SLICE 0xa356
#define mmCB_COLOR5_SLICE 0xa365
#define mmCB_COLOR6_SLICE 0xa374
#define mmCB_COLOR7_SLICE 0xa383
#define mmCB_COLOR0_VIEW 0xa31b
#define mmCB_COLOR1_VIEW 0xa32a
#define mmCB_COLOR2_VIEW 0xa339
#define mmCB_COLOR3_VIEW 0xa348
#define mmCB_COLOR4_VIEW 0xa357
#define mmCB_COLOR5_VIEW 0xa366
#define mmCB_COLOR6_VIEW 0xa375
#define mmCB_COLOR7_VIEW 0xa384
#define mmCB_COLOR0_INFO 0xa31c
#define mmCB_COLOR1_INFO 0xa32b
#define mmCB_COLOR2_INFO 0xa33a
#define mmCB_COLOR3_INFO 0xa349
#define mmCB_COLOR4_INFO 0xa358
#define mmCB_COLOR5_INFO 0xa367
#define mmCB_COLOR6_INFO 0xa376
#define mmCB_COLOR7_INFO 0xa385
#define mmCB_COLOR0_ATTRIB 0xa31d
#define mmCB_COLOR1_ATTRIB 0xa32c
#define mmCB_COLOR2_ATTRIB 0xa33b
#define mmCB_COLOR3_ATTRIB 0xa34a
#define mmCB_COLOR4_ATTRIB 0xa359
#define mmCB_COLOR5_ATTRIB 0xa368
#define mmCB_COLOR6_ATTRIB 0xa377
#define mmCB_COLOR7_ATTRIB 0xa386
#define mmCB_COLOR0_DCC_CONTROL 0xa31e
#define mmCB_COLOR1_DCC_CONTROL 0xa32d
#define mmCB_COLOR2_DCC_CONTROL 0xa33c
#define mmCB_COLOR3_DCC_CONTROL 0xa34b
#define mmCB_COLOR4_DCC_CONTROL 0xa35a
#define mmCB_COLOR5_DCC_CONTROL 0xa369
#define mmCB_COLOR6_DCC_CONTROL 0xa378
#define mmCB_COLOR7_DCC_CONTROL 0xa387
#define mmCB_COLOR0_CMASK 0xa31f
#define mmCB_COLOR1_CMASK 0xa32e
#define mmCB_COLOR2_CMASK 0xa33d
#define mmCB_COLOR3_CMASK 0xa34c
#define mmCB_COLOR4_CMASK 0xa35b
#define mmCB_COLOR5_CMASK 0xa36a
#define mmCB_COLOR6_CMASK 0xa379
#define mmCB_COLOR7_CMASK 0xa388
#define mmCB_COLOR0_CMASK_SLICE 0xa320
#define mmCB_COLOR1_CMASK_SLICE 0xa32f
#define mmCB_COLOR2_CMASK_SLICE 0xa33e
#define mmCB_COLOR3_CMASK_SLICE 0xa34d
#define mmCB_COLOR4_CMASK_SLICE 0xa35c
#define mmCB_COLOR5_CMASK_SLICE 0xa36b
#define mmCB_COLOR6_CMASK_SLICE 0xa37a
#define mmCB_COLOR7_CMASK_SLICE 0xa389
#define mmCB_COLOR0_FMASK 0xa321
#define mmCB_COLOR1_FMASK 0xa330
#define mmCB_COLOR2_FMASK 0xa33f
#define mmCB_COLOR3_FMASK 0xa34e
#define mmCB_COLOR4_FMASK 0xa35d
#define mmCB_COLOR5_FMASK 0xa36c
#define mmCB_COLOR6_FMASK 0xa37b
#define mmCB_COLOR7_FMASK 0xa38a
#define mmCB_COLOR0_FMASK_SLICE 0xa322
#define mmCB_COLOR1_FMASK_SLICE 0xa331
#define mmCB_COLOR2_FMASK_SLICE 0xa340
#define mmCB_COLOR3_FMASK_SLICE 0xa34f
#define mmCB_COLOR4_FMASK_SLICE 0xa35e
#define mmCB_COLOR5_FMASK_SLICE 0xa36d
#define mmCB_COLOR6_FMASK_SLICE 0xa37c
#define mmCB_COLOR7_FMASK_SLICE 0xa38b
#define mmCB_COLOR0_CLEAR_WORD0 0xa323
#define mmCB_COLOR1_CLEAR_WORD0 0xa332
#define mmCB_COLOR2_CLEAR_WORD0 0xa341
#define mmCB_COLOR3_CLEAR_WORD0 0xa350
#define mmCB_COLOR4_CLEAR_WORD0 0xa35f
#define mmCB_COLOR5_CLEAR_WORD0 0xa36e
#define mmCB_COLOR6_CLEAR_WORD0 0xa37d
#define mmCB_COLOR7_CLEAR_WORD0 0xa38c
#define mmCB_COLOR0_CLEAR_WORD1 0xa324
#define mmCB_COLOR1_CLEAR_WORD1 0xa333
#define mmCB_COLOR2_CLEAR_WORD1 0xa342
#define mmCB_COLOR3_CLEAR_WORD1 0xa351
#define mmCB_COLOR4_CLEAR_WORD1 0xa360
#define mmCB_COLOR5_CLEAR_WORD1 0xa36f
#define mmCB_COLOR6_CLEAR_WORD1 0xa37e
#define mmCB_COLOR7_CLEAR_WORD1 0xa38d
#define mmCB_COLOR0_DCC_BASE 0xa325
#define mmCB_COLOR1_DCC_BASE 0xa334
#define mmCB_COLOR2_DCC_BASE 0xa343
#define mmCB_COLOR3_DCC_BASE 0xa352
#define mmCB_COLOR4_DCC_BASE 0xa361
#define mmCB_COLOR5_DCC_BASE 0xa370
#define mmCB_COLOR6_DCC_BASE 0xa37f
#define mmCB_COLOR7_DCC_BASE 0xa38e
#define mmCB_TARGET_MASK 0xa08e
#define mmCB_SHADER_MASK 0xa08f
#define mmCB_HW_CONTROL 0x2684
#define mmCB_HW_CONTROL_1 0x2685
#define mmCB_HW_CONTROL_2 0x2686
#define mmCB_HW_CONTROL_3 0x2683
#define mmCB_DCC_CONFIG 0x2687
#define mmCB_PERFCOUNTER_FILTER 0xdc00
#define mmCB_PERFCOUNTER0_SELECT 0xdc01
#define mmCB_PERFCOUNTER0_SELECT1 0xdc02
#define mmCB_PERFCOUNTER1_SELECT 0xdc03
#define mmCB_PERFCOUNTER2_SELECT 0xdc04
#define mmCB_PERFCOUNTER3_SELECT 0xdc05
#define mmCB_PERFCOUNTER0_LO 0xd406
#define mmCB_PERFCOUNTER1_LO 0xd408
#define mmCB_PERFCOUNTER2_LO 0xd40a
#define mmCB_PERFCOUNTER3_LO 0xd40c
#define mmCB_PERFCOUNTER0_HI 0xd407
#define mmCB_PERFCOUNTER1_HI 0xd409
#define mmCB_PERFCOUNTER2_HI 0xd40b
#define mmCB_PERFCOUNTER3_HI 0xd40d
#define mmCB_CGTT_SCLK_CTRL 0xf0a8
#define mmCB_DEBUG_BUS_1 0x2699
#define mmCB_DEBUG_BUS_2 0x269a
#define mmCB_DEBUG_BUS_3 0x269b
#define mmCB_DEBUG_BUS_4 0x269c
#define mmCB_DEBUG_BUS_5 0x269d
#define mmCB_DEBUG_BUS_6 0x269e
#define mmCB_DEBUG_BUS_7 0x269f
#define mmCB_DEBUG_BUS_8 0x26a0
#define mmCB_DEBUG_BUS_9 0x26a1
#define mmCB_DEBUG_BUS_10 0x26a2
#define mmCB_DEBUG_BUS_11 0x26a3
#define mmCB_DEBUG_BUS_12 0x26a4
#define mmCB_DEBUG_BUS_13 0x26a5
#define mmCB_DEBUG_BUS_14 0x26a6
#define mmCB_DEBUG_BUS_15 0x26a7
#define mmCB_DEBUG_BUS_16 0x26a8
#define mmCB_DEBUG_BUS_17 0x26a9
#define mmCB_DEBUG_BUS_18 0x26aa
#define mmCB_DEBUG_BUS_19 0x26ab
#define mmCB_DEBUG_BUS_20 0x26ac
#define mmCB_DEBUG_BUS_21 0x26ad
#define mmCB_DEBUG_BUS_22 0x26ae
#define mmCP_DFY_CNTL 0x3020
#define mmCP_DFY_STAT 0x3021
#define mmCP_DFY_ADDR_HI 0x3022
#define mmCP_DFY_ADDR_LO 0x3023
#define mmCP_DFY_DATA_0 0x3024
#define mmCP_DFY_DATA_1 0x3025
#define mmCP_DFY_DATA_2 0x3026
#define mmCP_DFY_DATA_3 0x3027
#define mmCP_DFY_DATA_4 0x3028
#define mmCP_DFY_DATA_5 0x3029
#define mmCP_DFY_DATA_6 0x302a
#define mmCP_DFY_DATA_7 0x302b
#define mmCP_DFY_DATA_8 0x302c
#define mmCP_DFY_DATA_9 0x302d
#define mmCP_DFY_DATA_10 0x302e
#define mmCP_DFY_DATA_11 0x302f
#define mmCP_DFY_DATA_12 0x3030
#define mmCP_DFY_DATA_13 0x3031
#define mmCP_DFY_DATA_14 0x3032
#define mmCP_DFY_DATA_15 0x3033
#define mmCP_DFY_CMD 0x3034
#define mmCP_CPC_MGCG_SYNC_CNTL 0x3036
#define mmCP_RB0_BASE 0x3040
#define mmCP_RB0_BASE_HI 0x30b1
#define mmCP_RB_BASE 0x3040
#define mmCP_RB1_BASE 0x3060
#define mmCP_RB1_BASE_HI 0x30b2
#define mmCP_RB2_BASE 0x3065
#define mmCP_RB0_CNTL 0x3041
#define mmCP_RB_CNTL 0x3041
#define mmCP_RB1_CNTL 0x3061
#define mmCP_RB2_CNTL 0x3066
#define mmCP_RB_RPTR_WR 0x3042
#define mmCP_RB0_RPTR_ADDR 0x3043
#define mmCP_RB_RPTR_ADDR 0x3043
#define mmCP_RB1_RPTR_ADDR 0x3062
#define mmCP_RB2_RPTR_ADDR 0x3067
#define mmCP_RB0_RPTR_ADDR_HI 0x3044
#define mmCP_RB_RPTR_ADDR_HI 0x3044
#define mmCP_RB1_RPTR_ADDR_HI 0x3063
#define mmCP_RB2_RPTR_ADDR_HI 0x3068
#define mmCP_RB0_WPTR 0x3045
#define mmCP_RB_WPTR 0x3045
#define mmCP_RB1_WPTR 0x3064
#define mmCP_RB2_WPTR 0x3069
#define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046
#define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047
#define mmGC_PRIV_MODE 0x3048
#define mmCP_INT_CNTL 0x3049
#define mmCP_INT_CNTL_RING0 0x306a
#define mmCP_INT_CNTL_RING1 0x306b
#define mmCP_INT_CNTL_RING2 0x306c
#define mmCP_INT_STATUS 0x304a
#define mmCP_INT_STATUS_RING0 0x306d
#define mmCP_INT_STATUS_RING1 0x306e
#define mmCP_INT_STATUS_RING2 0x306f
#define mmCP_DEVICE_ID 0x304b
#define mmCP_RING_PRIORITY_CNTS 0x304c
#define mmCP_ME0_PIPE_PRIORITY_CNTS 0x304c
#define mmCP_RING0_PRIORITY 0x304d
#define mmCP_ME0_PIPE0_PRIORITY 0x304d
#define mmCP_RING1_PRIORITY 0x304e
#define mmCP_ME0_PIPE1_PRIORITY 0x304e
#define mmCP_RING2_PRIORITY 0x304f
#define mmCP_ME0_PIPE2_PRIORITY 0x304f
#define mmCP_ENDIAN_SWAP 0x3050
#define mmCP_RB_VMID 0x3051
#define mmCP_ME0_PIPE0_VMID 0x3052
#define mmCP_ME0_PIPE1_VMID 0x3053
#define mmCP_RB_DOORBELL_CONTROL 0x3059
#define mmCP_RB_DOORBELL_RANGE_LOWER 0x305a
#define mmCP_RB_DOORBELL_RANGE_UPPER 0x305b
#define mmCP_MEC_DOORBELL_RANGE_LOWER 0x305c
#define mmCP_MEC_DOORBELL_RANGE_UPPER 0x305d
#define mmCP_PFP_UCODE_ADDR 0xf814
#define mmCP_PFP_UCODE_DATA 0xf815
#define mmCP_ME_RAM_RADDR 0xf816
#define mmCP_ME_RAM_WADDR 0xf816
#define mmCP_ME_RAM_DATA 0xf817
#define mmCGTT_CPC_CLK_CTRL 0xf0b2
#define mmCGTT_CPF_CLK_CTRL 0xf0b1
#define mmCGTT_CP_CLK_CTRL 0xf0b0
#define mmCP_CE_UCODE_ADDR 0xf818
#define mmCP_CE_UCODE_DATA 0xf819
#define mmCP_MEC_ME1_UCODE_ADDR 0xf81a
#define mmCP_MEC_ME1_UCODE_DATA 0xf81b
#define mmCP_MEC_ME2_UCODE_ADDR 0xf81c
#define mmCP_MEC_ME2_UCODE_DATA 0xf81d
#define mmCP_MEC1_F32_INT_DIS 0x30bd
#define mmCP_MEC2_F32_INT_DIS 0x30be
#define mmCP_VIRT_STATUS 0x3038
#define mmCP_PWR_CNTL 0x3078
#define mmCP_MEM_SLP_CNTL 0x3079
#define mmCP_ECC_FIRSTOCCURRENCE 0x307a
#define mmCP_ECC_FIRSTOCCURRENCE_RING0 0x307b
#define mmCP_ECC_FIRSTOCCURRENCE_RING1 0x307c
#define mmCP_ECC_FIRSTOCCURRENCE_RING2 0x307d
#define mmCP_CPF_DEBUG 0x3080
#define mmCP_PQ_WPTR_POLL_CNTL 0x3083
#define mmCP_PQ_WPTR_POLL_CNTL1 0x3084
#define mmCPC_INT_CNTL 0x30b4
#define mmCP_ME1_PIPE0_INT_CNTL 0x3085
#define mmCP_ME1_PIPE1_INT_CNTL 0x3086
#define mmCP_ME1_PIPE2_INT_CNTL 0x3087
#define mmCP_ME1_PIPE3_INT_CNTL 0x3088
#define mmCP_ME2_PIPE0_INT_CNTL 0x3089
#define mmCP_ME2_PIPE1_INT_CNTL 0x308a
#define mmCP_ME2_PIPE2_INT_CNTL 0x308b
#define mmCP_ME2_PIPE3_INT_CNTL 0x308c
#define mmCPC_INT_STATUS 0x30b5
#define mmCP_ME1_PIPE0_INT_STATUS 0x308d
#define mmCP_ME1_PIPE1_INT_STATUS 0x308e
#define mmCP_ME1_PIPE2_INT_STATUS 0x308f
#define mmCP_ME1_PIPE3_INT_STATUS 0x3090
#define mmCP_ME2_PIPE0_INT_STATUS 0x3091
#define mmCP_ME2_PIPE1_INT_STATUS 0x3092
#define mmCP_ME2_PIPE2_INT_STATUS 0x3093
#define mmCP_ME2_PIPE3_INT_STATUS 0x3094
#define mmCP_ME1_INT_STAT_DEBUG 0x3095
#define mmCP_ME2_INT_STAT_DEBUG 0x3096
#define mmCP_ME1_PIPE_PRIORITY_CNTS 0x3099
#define mmCP_ME1_PIPE0_PRIORITY 0x309a
#define mmCP_ME1_PIPE1_PRIORITY 0x309b
#define mmCP_ME1_PIPE2_PRIORITY 0x309c
#define mmCP_ME1_PIPE3_PRIORITY 0x309d
#define mmCP_ME2_PIPE_PRIORITY_CNTS 0x309e
#define mmCP_ME2_PIPE0_PRIORITY 0x309f
#define mmCP_ME2_PIPE1_PRIORITY 0x30a0
#define mmCP_ME2_PIPE2_PRIORITY 0x30a1
#define mmCP_ME2_PIPE3_PRIORITY 0x30a2
#define mmCP_CE_PRGRM_CNTR_START 0x30a3
#define mmCP_PFP_PRGRM_CNTR_START 0x30a4
#define mmCP_ME_PRGRM_CNTR_START 0x30a5
#define mmCP_MEC1_PRGRM_CNTR_START 0x30a6
#define mmCP_MEC2_PRGRM_CNTR_START 0x30a7
#define mmCP_CE_INTR_ROUTINE_START 0x30a8
#define mmCP_PFP_INTR_ROUTINE_START 0x30a9
#define mmCP_ME_INTR_ROUTINE_START 0x30aa
#define mmCP_MEC1_INTR_ROUTINE_START 0x30ab
#define mmCP_MEC2_INTR_ROUTINE_START 0x30ac
#define mmCP_CONTEXT_CNTL 0x30ad
#define mmCP_MAX_CONTEXT 0x30ae
#define mmCP_IQ_WAIT_TIME1 0x30af
#define mmCP_IQ_WAIT_TIME2 0x30b0
#define mmCP_VMID_RESET 0x30b3
#define mmCP_VMID_PREEMPT 0x30b6
#define mmCP_VMID_STATUS 0x30bf
#define mmCPC_INT_CNTX_ID 0x30b7
#define mmCP_PQ_STATUS 0x30b8
#define mmCP_CPC_IC_BASE_LO 0x30b9
#define mmCP_CPC_IC_BASE_HI 0x30ba
#define mmCP_CPC_IC_BASE_CNTL 0x30bb
#define mmCP_CPC_IC_OP_CNTL 0x30bc
#define mmCP_CPC_STATUS 0x2084
#define mmCP_CPC_BUSY_STAT 0x2085
#define mmCP_CPC_STALLED_STAT1 0x2086
#define mmCP_CPF_STATUS 0x2087
#define mmCP_CPF_BUSY_STAT 0x2088
#define mmCP_CPF_STALLED_STAT1 0x2089
#define mmCP_CPC_GRBM_FREE_COUNT 0x208b
#define mmCP_MEC_CNTL 0x208d
#define mmCP_MEC_ME1_HEADER_DUMP 0x208e
#define mmCP_MEC_ME2_HEADER_DUMP 0x208f
#define mmCP_CPC_SCRATCH_INDEX 0x2090
#define mmCP_CPC_SCRATCH_DATA 0x2091
#define mmCPG_PERFCOUNTER1_SELECT 0xd800
#define mmCPG_PERFCOUNTER1_LO 0xd000
#define mmCPG_PERFCOUNTER1_HI 0xd001
#define mmCPG_PERFCOUNTER0_SELECT1 0xd801
#define mmCPG_PERFCOUNTER0_SELECT 0xd802
#define mmCPG_PERFCOUNTER0_LO 0xd002
#define mmCPG_PERFCOUNTER0_HI 0xd003
#define mmCPC_PERFCOUNTER1_SELECT 0xd803
#define mmCPC_PERFCOUNTER1_LO 0xd004
#define mmCPC_PERFCOUNTER1_HI 0xd005
#define mmCPC_PERFCOUNTER0_SELECT1 0xd804
#define mmCPC_PERFCOUNTER0_SELECT 0xd809
#define mmCPC_PERFCOUNTER0_LO 0xd006
#define mmCPC_PERFCOUNTER0_HI 0xd007
#define mmCPF_PERFCOUNTER1_SELECT 0xd805
#define mmCPF_PERFCOUNTER1_LO 0xd008
#define mmCPF_PERFCOUNTER1_HI 0xd009
#define mmCPF_PERFCOUNTER0_SELECT1 0xd806
#define mmCPF_PERFCOUNTER0_SELECT 0xd807
#define mmCPF_PERFCOUNTER0_LO 0xd00a
#define mmCPF_PERFCOUNTER0_HI 0xd00b
#define mmCP_CPC_HALT_HYST_COUNT 0x20a7
#define mmCP_DRAW_OBJECT 0xd810
#define mmCP_DRAW_OBJECT_COUNTER 0xd811
#define mmCP_DRAW_WINDOW_MASK_HI 0xd812
#define mmCP_DRAW_WINDOW_HI 0xd813
#define mmCP_DRAW_WINDOW_LO 0xd814
#define mmCP_DRAW_WINDOW_CNTL 0xd815
#define mmCP_PRT_LOD_STATS_CNTL0 0x20ad
#define mmCP_PRT_LOD_STATS_CNTL1 0x20ae
#define mmCP_PRT_LOD_STATS_CNTL2 0x20af
#define mmCP_CE_COMPARE_COUNT 0x20c0
#define mmCP_CE_DE_COUNT 0x20c1
#define mmCP_DE_CE_COUNT 0x20c2
#define mmCP_DE_LAST_INVAL_COUNT 0x20c3
#define mmCP_DE_DE_COUNT 0x20c4
#define mmCP_EOP_DONE_EVENT_CNTL 0xc0d5
#define mmCP_EOP_DONE_DATA_CNTL 0xc0d6
#define mmCP_EOP_DONE_CNTX_ID 0xc0d7
#define mmCP_EOP_DONE_ADDR_LO 0xc000
#define mmCP_EOP_DONE_ADDR_HI 0xc001
#define mmCP_EOP_DONE_DATA_LO 0xc002
#define mmCP_EOP_DONE_DATA_HI 0xc003
#define mmCP_EOP_LAST_FENCE_LO 0xc004
#define mmCP_EOP_LAST_FENCE_HI 0xc005
#define mmCP_STREAM_OUT_ADDR_LO 0xc006
#define mmCP_STREAM_OUT_ADDR_HI 0xc007
#define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO 0xc008
#define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI 0xc009
#define mmCP_NUM_PRIM_NEEDED_COUNT0_LO 0xc00a
#define mmCP_NUM_PRIM_NEEDED_COUNT0_HI 0xc00b
#define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO 0xc00c
#define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI 0xc00d
#define mmCP_NUM_PRIM_NEEDED_COUNT1_LO 0xc00e
#define mmCP_NUM_PRIM_NEEDED_COUNT1_HI 0xc00f
#define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO 0xc010
#define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI 0xc011
#define mmCP_NUM_PRIM_NEEDED_COUNT2_LO 0xc012
#define mmCP_NUM_PRIM_NEEDED_COUNT2_HI 0xc013
#define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO 0xc014
#define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI 0xc015
#define mmCP_NUM_PRIM_NEEDED_COUNT3_LO 0xc016
#define mmCP_NUM_PRIM_NEEDED_COUNT3_HI 0xc017
#define mmCP_PIPE_STATS_ADDR_LO 0xc018
#define mmCP_PIPE_STATS_ADDR_HI 0xc019
#define mmCP_VGT_IAVERT_COUNT_LO 0xc01a
#define mmCP_VGT_IAVERT_COUNT_HI 0xc01b
#define mmCP_VGT_IAPRIM_COUNT_LO 0xc01c
#define mmCP_VGT_IAPRIM_COUNT_HI 0xc01d
#define mmCP_VGT_GSPRIM_COUNT_LO 0xc01e
#define mmCP_VGT_GSPRIM_COUNT_HI 0xc01f
#define mmCP_VGT_VSINVOC_COUNT_LO 0xc020
#define mmCP_VGT_VSINVOC_COUNT_HI 0xc021
#define mmCP_VGT_GSINVOC_COUNT_LO 0xc022
#define mmCP_VGT_GSINVOC_COUNT_HI 0xc023
#define mmCP_VGT_HSINVOC_COUNT_LO 0xc024
#define mmCP_VGT_HSINVOC_COUNT_HI 0xc025
#define mmCP_VGT_DSINVOC_COUNT_LO 0xc026
#define mmCP_VGT_DSINVOC_COUNT_HI 0xc027
#define mmCP_PA_CINVOC_COUNT_LO 0xc028
#define mmCP_PA_CINVOC_COUNT_HI 0xc029
#define mmCP_PA_CPRIM_COUNT_LO 0xc02a
#define mmCP_PA_CPRIM_COUNT_HI 0xc02b
#define mmCP_SC_PSINVOC_COUNT0_LO 0xc02c
#define mmCP_SC_PSINVOC_COUNT0_HI 0xc02d
#define mmCP_SC_PSINVOC_COUNT1_LO 0xc02e
#define mmCP_SC_PSINVOC_COUNT1_HI 0xc02f
#define mmCP_VGT_CSINVOC_COUNT_LO 0xc030
#define mmCP_VGT_CSINVOC_COUNT_HI 0xc031
#define mmCP_PIPE_STATS_CONTROL 0xc03d
#define mmCP_STREAM_OUT_CONTROL 0xc03e
#define mmCP_STRMOUT_CNTL 0xc03f
#define mmSCRATCH_REG0 0xc040
#define mmSCRATCH_REG1 0xc041
#define mmSCRATCH_REG2 0xc042
#define mmSCRATCH_REG3 0xc043
#define mmSCRATCH_REG4 0xc044
#define mmSCRATCH_REG5 0xc045
#define mmSCRATCH_REG6 0xc046
#define mmSCRATCH_REG7 0xc047
#define mmSCRATCH_UMSK 0xc050
#define mmSCRATCH_ADDR 0xc051
#define mmCP_PFP_ATOMIC_PREOP_LO 0xc052
#define mmCP_PFP_ATOMIC_PREOP_HI 0xc053
#define mmCP_PFP_GDS_ATOMIC0_PREOP_LO 0xc054
#define mmCP_PFP_GDS_ATOMIC0_PREOP_HI 0xc055
#define mmCP_PFP_GDS_ATOMIC1_PREOP_LO 0xc056
#define mmCP_PFP_GDS_ATOMIC1_PREOP_HI 0xc057
#define mmCP_APPEND_ADDR_LO 0xc058
#define mmCP_APPEND_ADDR_HI 0xc059
#define mmCP_APPEND_DATA 0xc05a
#define mmCP_APPEND_LAST_CS_FENCE 0xc05b
#define mmCP_APPEND_LAST_PS_FENCE 0xc05c
#define mmCP_ATOMIC_PREOP_LO 0xc05d
#define mmCP_ME_ATOMIC_PREOP_LO 0xc05d
#define mmCP_ATOMIC_PREOP_HI 0xc05e
#define mmCP_ME_ATOMIC_PREOP_HI 0xc05e
#define mmCP_GDS_ATOMIC0_PREOP_LO 0xc05f
#define mmCP_ME_GDS_ATOMIC0_PREOP_LO 0xc05f
#define mmCP_GDS_ATOMIC0_PREOP_HI 0xc060
#define mmCP_ME_GDS_ATOMIC0_PREOP_HI 0xc060
#define mmCP_GDS_ATOMIC1_PREOP_LO 0xc061
#define mmCP_ME_GDS_ATOMIC1_PREOP_LO 0xc061
#define mmCP_GDS_ATOMIC1_PREOP_HI 0xc062
#define mmCP_ME_GDS_ATOMIC1_PREOP_HI 0xc062
#define mmCP_ME_MC_WADDR_LO 0xc069
#define mmCP_ME_MC_WADDR_HI 0xc06a
#define mmCP_ME_MC_WDATA_LO 0xc06b
#define mmCP_ME_MC_WDATA_HI 0xc06c
#define mmCP_ME_MC_RADDR_LO 0xc06d
#define mmCP_ME_MC_RADDR_HI 0xc06e
#define mmCP_SEM_WAIT_TIMER 0xc06f
#define mmCP_SIG_SEM_ADDR_LO 0xc070
#define mmCP_SIG_SEM_ADDR_HI 0xc071
#define mmCP_WAIT_SEM_ADDR_LO 0xc075
#define mmCP_WAIT_SEM_ADDR_HI 0xc076
#define mmCP_WAIT_REG_MEM_TIMEOUT 0xc074
#define mmCP_COHER_START_DELAY 0xc07b
#define mmCP_COHER_CNTL 0xc07c
#define mmCP_COHER_SIZE 0xc07d
#define mmCP_COHER_SIZE_HI 0xc08c
#define mmCP_COHER_BASE 0xc07e
#define mmCP_COHER_BASE_HI 0xc079
#define mmCP_COHER_STATUS 0xc07f
#define mmCOHER_DEST_BASE_0 0xa092
#define mmCOHER_DEST_BASE_1 0xa093
#define mmCOHER_DEST_BASE_2 0xa07e
#define mmCOHER_DEST_BASE_3 0xa07f
#define mmCOHER_DEST_BASE_HI_0 0xa07a
#define mmCOHER_DEST_BASE_HI_1 0xa07b
#define mmCOHER_DEST_BASE_HI_2 0xa07c
#define mmCOHER_DEST_BASE_HI_3 0xa07d
#define mmCP_DMA_ME_SRC_ADDR 0xc080
#define mmCP_DMA_ME_SRC_ADDR_HI 0xc081
#define mmCP_DMA_ME_DST_ADDR 0xc082
#define mmCP_DMA_ME_DST_ADDR_HI 0xc083
#define mmCP_DMA_ME_CONTROL 0xc078
#define mmCP_DMA_ME_COMMAND 0xc084
#define mmCP_DMA_PFP_SRC_ADDR 0xc085
#define mmCP_DMA_PFP_SRC_ADDR_HI 0xc086
#define mmCP_DMA_PFP_DST_ADDR 0xc087
#define mmCP_DMA_PFP_DST_ADDR_HI 0xc088
#define mmCP_DMA_PFP_CONTROL 0xc077
#define mmCP_DMA_PFP_COMMAND 0xc089
#define mmCP_DMA_CNTL 0xc08a
#define mmCP_DMA_READ_TAGS 0xc08b
#define mmCP_PFP_IB_CONTROL 0xc08d
#define mmCP_PFP_LOAD_CONTROL 0xc08e
#define mmCP_SCRATCH_INDEX 0xc08f
#define mmCP_SCRATCH_DATA 0xc090
#define mmCP_RB_OFFSET 0xc091
#define mmCP_IB1_OFFSET 0xc092
#define mmCP_IB2_OFFSET 0xc093
#define mmCP_IB1_PREAMBLE_BEGIN 0xc094
#define mmCP_IB1_PREAMBLE_END 0xc095
#define mmCP_IB2_PREAMBLE_BEGIN 0xc096
#define mmCP_IB2_PREAMBLE_END 0xc097
#define mmCP_CE_IB1_OFFSET 0xc098
#define mmCP_CE_IB2_OFFSET 0xc099
#define mmCP_CE_COUNTER 0xc09a
#define mmCP_CE_RB_OFFSET 0xc09b
#define mmCP_PFP_COMPLETION_STATUS 0xc0ec
#define mmCP_CE_COMPLETION_STATUS 0xc0ed
#define mmCP_PRED_NOT_VISIBLE 0xc0ee
#define mmCP_PFP_METADATA_BASE_ADDR 0xc0f0
#define mmCP_PFP_METADATA_BASE_ADDR_HI 0xc0f1
#define mmCP_CE_METADATA_BASE_ADDR 0xc0f2
#define mmCP_CE_METADATA_BASE_ADDR_HI 0xc0f3
#define mmCP_DRAW_INDX_INDR_ADDR 0xc0f4
#define mmCP_DRAW_INDX_INDR_ADDR_HI 0xc0f5
#define mmCP_DISPATCH_INDR_ADDR 0xc0f6
#define mmCP_DISPATCH_INDR_ADDR_HI 0xc0f7
#define mmCP_INDEX_BASE_ADDR 0xc0f8
#define mmCP_INDEX_BASE_ADDR_HI 0xc0f9
#define mmCP_INDEX_TYPE 0xc0fa
#define mmCP_GDS_BKUP_ADDR 0xc0fb
#define mmCP_GDS_BKUP_ADDR_HI 0xc0fc
#define mmCP_SAMPLE_STATUS 0xc0fd
#define mmCP_STALLED_STAT1 0x219d
#define mmCP_STALLED_STAT2 0x219e
#define mmCP_STALLED_STAT3 0x219c
#define mmCP_BUSY_STAT 0x219f
#define mmCP_STAT 0x21a0
#define mmCP_ME_HEADER_DUMP 0x21a1
#define mmCP_PFP_HEADER_DUMP 0x21a2
#define mmCP_GRBM_FREE_COUNT 0x21a3
#define mmCP_CE_HEADER_DUMP 0x21a4
#define mmCP_CSF_STAT 0x21b4
#define mmCP_CSF_CNTL 0x21b5
#define mmCP_ME_CNTL 0x21b6
#define mmCP_CNTX_STAT 0x21b8
#define mmCP_ME_PREEMPTION 0x21b9
#define mmCP_RB0_RPTR 0x21c0
#define mmCP_RB_RPTR 0x21c0
#define mmCP_RB1_RPTR 0x21bf
#define mmCP_RB2_RPTR 0x21be
#define mmCP_RB_WPTR_DELAY 0x21c1
#define mmCP_RB_WPTR_POLL_CNTL 0x21c2
#define mmCP_CE_INIT_BASE_LO 0xc0c3
#define mmCP_CE_INIT_BASE_HI 0xc0c4
#define mmCP_CE_INIT_BUFSZ 0xc0c5
#define mmCP_CE_IB1_BASE_LO 0xc0c6
#define mmCP_CE_IB1_BASE_HI 0xc0c7
#define mmCP_CE_IB1_BUFSZ 0xc0c8
#define mmCP_CE_IB2_BASE_LO 0xc0c9
#define mmCP_CE_IB2_BASE_HI 0xc0ca
#define mmCP_CE_IB2_BUFSZ 0xc0cb
#define mmCP_IB1_BASE_LO 0xc0cc
#define mmCP_IB1_BASE_HI 0xc0cd
#define mmCP_IB1_BUFSZ 0xc0ce
#define mmCP_IB2_BASE_LO 0xc0cf
#define mmCP_IB2_BASE_HI 0xc0d0
#define mmCP_IB2_BUFSZ 0xc0d1
#define mmCP_ST_BASE_LO 0xc0d2
#define mmCP_ST_BASE_HI 0xc0d3
#define mmCP_ST_BUFSZ 0xc0d4
#define mmCP_ROQ_THRESHOLDS 0x21bc
#define mmCP_MEQ_STQ_THRESHOLD 0x21bd
#define mmCP_ROQ1_THRESHOLDS 0x21d5
#define mmCP_ROQ2_THRESHOLDS 0x21d6
#define mmCP_STQ_THRESHOLDS 0x21d7
#define mmCP_QUEUE_THRESHOLDS 0x21d8
#define mmCP_MEQ_THRESHOLDS 0x21d9
#define mmCP_ROQ_AVAIL 0x21da
#define mmCP_STQ_AVAIL 0x21db
#define mmCP_ROQ2_AVAIL 0x21dc
#define mmCP_MEQ_AVAIL 0x21dd
#define mmCP_CMD_INDEX 0x21de
#define mmCP_CMD_DATA 0x21df
#define mmCP_ROQ_RB_STAT 0x21e0
#define mmCP_ROQ_IB1_STAT 0x21e1
#define mmCP_ROQ_IB2_STAT 0x21e2
#define mmCP_STQ_STAT 0x21e3
#define mmCP_STQ_WR_STAT 0x21e4
#define mmCP_MEQ_STAT 0x21e5
#define mmCP_CEQ1_AVAIL 0x21e6
#define mmCP_CEQ2_AVAIL 0x21e7
#define mmCP_CE_ROQ_RB_STAT 0x21e8
#define mmCP_CE_ROQ_IB1_STAT 0x21e9
#define mmCP_CE_ROQ_IB2_STAT 0x21ea
#define mmCP_INT_STAT_DEBUG 0x21f7
#define mmCP_PERFMON_CNTL 0xd808
#define mmCP_PERFMON_CNTX_CNTL 0xa0d8
#define mmCP_RINGID 0xa0d9
#define mmCP_PIPEID 0xa0d9
#define mmCP_VMID 0xa0da
#define mmCP_HPD_ROQ_OFFSETS 0x3240
#define mmCP_HPD_STATUS0 0x3241
#define mmCP_MQD_BASE_ADDR 0x3245
#define mmCP_MQD_BASE_ADDR_HI 0x3246
#define mmCP_HQD_ACTIVE 0x3247
#define mmCP_HQD_VMID 0x3248
#define mmCP_HQD_PERSISTENT_STATE 0x3249
#define mmCP_HQD_PIPE_PRIORITY 0x324a
#define mmCP_HQD_QUEUE_PRIORITY 0x324b
#define mmCP_HQD_QUANTUM 0x324c
#define mmCP_HQD_PQ_BASE 0x324d
#define mmCP_HQD_PQ_BASE_HI 0x324e
#define mmCP_HQD_PQ_RPTR 0x324f
#define mmCP_HQD_PQ_RPTR_REPORT_ADDR 0x3250
#define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251
#define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252
#define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253
#define mmCP_HQD_PQ_DOORBELL_CONTROL 0x3254
#define mmCP_HQD_PQ_WPTR 0x3255
#define mmCP_HQD_PQ_CONTROL 0x3256
#define mmCP_HQD_IB_BASE_ADDR 0x3257
#define mmCP_HQD_IB_BASE_ADDR_HI 0x3258
#define mmCP_HQD_IB_RPTR 0x3259
#define mmCP_HQD_IB_CONTROL 0x325a
#define mmCP_HQD_IQ_TIMER 0x325b
#define mmCP_HQD_IQ_RPTR 0x325c
#define mmCP_HQD_DEQUEUE_REQUEST 0x325d
#define mmCP_HQD_DMA_OFFLOAD 0x325e
#define mmCP_HQD_OFFLOAD 0x325e
#define mmCP_HQD_SEMA_CMD 0x325f
#define mmCP_HQD_MSG_TYPE 0x3260
#define mmCP_HQD_ATOMIC0_PREOP_LO 0x3261
#define mmCP_HQD_ATOMIC0_PREOP_HI 0x3262
#define mmCP_HQD_ATOMIC1_PREOP_LO 0x3263
#define mmCP_HQD_ATOMIC1_PREOP_HI 0x3264
#define mmCP_HQD_HQ_SCHEDULER0 0x3265
#define mmCP_HQD_HQ_STATUS0 0x3265
#define mmCP_HQD_HQ_SCHEDULER1 0x3266
#define mmCP_HQD_HQ_CONTROL0 0x3266
#define mmCP_MQD_CONTROL 0x3267
#define mmCP_HQD_HQ_STATUS1 0x3268
#define mmCP_HQD_HQ_CONTROL1 0x3269
#define mmCP_HQD_EOP_BASE_ADDR 0x326a
#define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b
#define mmCP_HQD_EOP_CONTROL 0x326c
#define mmCP_HQD_EOP_RPTR 0x326d
#define mmCP_HQD_EOP_WPTR 0x326e
#define mmCP_HQD_EOP_EVENTS 0x326f
#define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO 0x3270
#define mmCP_HQD_CTX_SAVE_BASE_ADDR_HI 0x3271
#define mmCP_HQD_CTX_SAVE_CONTROL 0x3272
#define mmCP_HQD_CNTL_STACK_OFFSET 0x3273
#define mmCP_HQD_CNTL_STACK_SIZE 0x3274
#define mmCP_HQD_WG_STATE_OFFSET 0x3275
#define mmCP_HQD_CTX_SAVE_SIZE 0x3276
#define mmCP_HQD_GDS_RESOURCE_STATE 0x3277
#define mmCP_HQD_ERROR 0x3278
#define mmCP_HQD_EOP_WPTR_MEM 0x3279
#define mmCP_HQD_EOP_DONES 0x327a
#define mmDB_Z_READ_BASE 0xa012
#define mmDB_STENCIL_READ_BASE 0xa013
#define mmDB_Z_WRITE_BASE 0xa014
#define mmDB_STENCIL_WRITE_BASE 0xa015
#define mmDB_DEPTH_INFO 0xa00f
#define mmDB_Z_INFO 0xa010
#define mmDB_STENCIL_INFO 0xa011
#define mmDB_DEPTH_SIZE 0xa016
#define mmDB_DEPTH_SLICE 0xa017
#define mmDB_DEPTH_VIEW 0xa002
#define mmDB_RENDER_CONTROL 0xa000
#define mmDB_COUNT_CONTROL 0xa001
#define mmDB_RENDER_OVERRIDE 0xa003
#define mmDB_RENDER_OVERRIDE2 0xa004
#define mmDB_EQAA 0xa201
#define mmDB_SHADER_CONTROL 0xa203
#define mmDB_DEPTH_BOUNDS_MIN 0xa008
#define mmDB_DEPTH_BOUNDS_MAX 0xa009
#define mmDB_STENCIL_CLEAR 0xa00a
#define mmDB_DEPTH_CLEAR 0xa00b
#define mmDB_HTILE_DATA_BASE 0xa005
#define mmDB_HTILE_SURFACE 0xa2af
#define mmDB_PRELOAD_CONTROL 0xa2b2
#define mmDB_STENCILREFMASK 0xa10c
#define mmDB_STENCILREFMASK_BF 0xa10d
#define mmDB_SRESULTS_COMPARE_STATE0 0xa2b0
#define mmDB_SRESULTS_COMPARE_STATE1 0xa2b1
#define mmDB_DEPTH_CONTROL 0xa200
#define mmDB_STENCIL_CONTROL 0xa10b
#define mmDB_ALPHA_TO_MASK 0xa2dc
#define mmDB_PERFCOUNTER0_SELECT 0xdc40
#define mmDB_PERFCOUNTER1_SELECT 0xdc42
#define mmDB_PERFCOUNTER2_SELECT 0xdc44
#define mmDB_PERFCOUNTER3_SELECT 0xdc46
#define mmDB_PERFCOUNTER0_SELECT1 0xdc41
#define mmDB_PERFCOUNTER1_SELECT1 0xdc43
#define mmDB_PERFCOUNTER0_LO 0xd440
#define mmDB_PERFCOUNTER1_LO 0xd442
#define mmDB_PERFCOUNTER2_LO 0xd444
#define mmDB_PERFCOUNTER3_LO 0xd446
#define mmDB_PERFCOUNTER0_HI 0xd441
#define mmDB_PERFCOUNTER1_HI 0xd443
#define mmDB_PERFCOUNTER2_HI 0xd445
#define mmDB_PERFCOUNTER3_HI 0xd447
#define mmDB_DEBUG 0x260c
#define mmDB_DEBUG2 0x260d
#define mmDB_DEBUG3 0x260e
#define mmDB_DEBUG4 0x260f
#define mmDB_CREDIT_LIMIT 0x2614
#define mmDB_WATERMARKS 0x2615
#define mmDB_SUBTILE_CONTROL 0x2616
#define mmDB_FREE_CACHELINES 0x2617
#define mmDB_FIFO_DEPTH1 0x2618
#define mmDB_FIFO_DEPTH2 0x2619
#define mmDB_CGTT_CLK_CTRL_0 0xf0a4
#define mmDB_ZPASS_COUNT_LOW 0xc3fe
#define mmDB_ZPASS_COUNT_HI 0xc3ff
#define mmDB_RING_CONTROL 0x261b
#define mmDB_READ_DEBUG_0 0x2620
#define mmDB_READ_DEBUG_1 0x2621
#define mmDB_READ_DEBUG_2 0x2622
#define mmDB_READ_DEBUG_3 0x2623
#define mmDB_READ_DEBUG_4 0x2624
#define mmDB_READ_DEBUG_5 0x2625
#define mmDB_READ_DEBUG_6 0x2626
#define mmDB_READ_DEBUG_7 0x2627
#define mmDB_READ_DEBUG_8 0x2628
#define mmDB_READ_DEBUG_9 0x2629
#define mmDB_READ_DEBUG_A 0x262a
#define mmDB_READ_DEBUG_B 0x262b
#define mmDB_READ_DEBUG_C 0x262c
#define mmDB_READ_DEBUG_D 0x262d
#define mmDB_READ_DEBUG_E 0x262e
#define mmDB_READ_DEBUG_F 0x262f
#define mmDB_OCCLUSION_COUNT0_LOW 0xc3c0
#define mmDB_OCCLUSION_COUNT0_HI 0xc3c1
#define mmDB_OCCLUSION_COUNT1_LOW 0xc3c2
#define mmDB_OCCLUSION_COUNT1_HI 0xc3c3
#define mmDB_OCCLUSION_COUNT2_LOW 0xc3c4
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