Quelle  dce_calcs.c   Sprache: C

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "resource.h"
#include "dm_services.h"
#include "dce_calcs.h"
#include "dc.h"
#include "core_types.h"
#include "dal_asic_id.h"
#include "calcs_logger.h"

/*
 * NOTE:
 *   This file is gcc-parseable HW gospel, coming straight from HW engineers.
 *
 * It doesn't adhere to Linux kernel style and sometimes will do things in odd
 * ways. Unless there is something clearly wrong with it the code should
 * remain as-is as it provides us with a guarantee from HW that it is correct.
 */

/*******************************************************************************
 * Private Functions
 ******************************************************************************/

static enum bw_calcs_version bw_calcs_version_from_asic_id(struct hw_asic_id asic_id)
{
 switch (asic_id.chip_family) {

 case FAMILY_CZ:
  if (ASIC_REV_IS_STONEY(asic_id.hw_internal_rev))
   return BW_CALCS_VERSION_STONEY;
  return BW_CALCS_VERSION_CARRIZO;

 case FAMILY_VI:
  if (ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev))
   return BW_CALCS_VERSION_POLARIS12;
  if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev))
   return BW_CALCS_VERSION_POLARIS10;
  if (ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev))
   return BW_CALCS_VERSION_POLARIS11;
  if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev))
   return BW_CALCS_VERSION_VEGAM;
  return BW_CALCS_VERSION_INVALID;

 case FAMILY_AI:
  return BW_CALCS_VERSION_VEGA10;

 default:
  return BW_CALCS_VERSION_INVALID;
 }
}

static void calculate_bandwidth(
 const struct bw_calcs_dceip *dceip,
 const struct bw_calcs_vbios *vbios,
 struct bw_calcs_data *data)

{
 const int32_t pixels_per_chunk = 512;
 const int32_t high = 2;
 const int32_t mid = 1;
 const int32_t low = 0;
 const uint32_t s_low = 0;
 const uint32_t s_mid1 = 1;
 const uint32_t s_mid2 = 2;
 const uint32_t s_mid3 = 3;
 const uint32_t s_mid4 = 4;
 const uint32_t s_mid5 = 5;
 const uint32_t s_mid6 = 6;
 const uint32_t s_high = 7;
 const uint32_t dmif_chunk_buff_margin = 1;

 uint32_t max_chunks_fbc_mode = 0;
 int32_t num_cursor_lines;

 int32_t i, j, k;
 struct bw_fixed *yclk;
 struct bw_fixed *sclk;
 bool d0_underlay_enable;
 bool d1_underlay_enable;
 bool fbc_enabled;
 bool lpt_enabled;
 enum bw_defines sclk_message;
 enum bw_defines yclk_message;
 enum bw_defines *tiling_mode;
 enum bw_defines *surface_type;
 enum bw_defines voltage;
 enum bw_defines pipe_check;
 enum bw_defines hsr_check;
 enum bw_defines vsr_check;
 enum bw_defines lb_size_check;
 enum bw_defines fbc_check;
 enum bw_defines rotation_check;
 enum bw_defines mode_check;
 enum bw_defines nbp_state_change_enable_blank;
 /*initialize variables*/
 int32_t number_of_displays_enabled = 0;
 int32_t number_of_displays_enabled_with_margin = 0;
 int32_t number_of_aligned_displays_with_no_margin = 0;

 yclk = kcalloc(3, sizeof(*yclk), GFP_KERNEL);
 if (!yclk)
  return;

 sclk = kcalloc(8, sizeof(*sclk), GFP_KERNEL);
 if (!sclk)
  goto free_yclk;

 tiling_mode = kcalloc(maximum_number_of_surfaces, sizeof(*tiling_mode), GFP_KERNEL);
 if (!tiling_mode)
  goto free_sclk;

 surface_type = kcalloc(maximum_number_of_surfaces, sizeof(*surface_type), GFP_KERNEL);
 if (!surface_type)
  goto free_tiling_mode;

 yclk[low] = vbios->low_yclk;
 yclk[mid] = vbios->mid_yclk;
 yclk[high] = vbios->high_yclk;
 sclk[s_low] = vbios->low_sclk;
 sclk[s_mid1] = vbios->mid1_sclk;
 sclk[s_mid2] = vbios->mid2_sclk;
 sclk[s_mid3] = vbios->mid3_sclk;
 sclk[s_mid4] = vbios->mid4_sclk;
 sclk[s_mid5] = vbios->mid5_sclk;
 sclk[s_mid6] = vbios->mid6_sclk;
 sclk[s_high] = vbios->high_sclk;
 /*''''''''''''''''''*/
 /* surface assignment:*/
 /* 0: d0 underlay or underlay luma*/
 /* 1: d0 underlay chroma*/
 /* 2: d1 underlay or underlay luma*/
 /* 3: d1 underlay chroma*/
 /* 4: d0 graphics*/
 /* 5: d1 graphics*/
 /* 6: d2 graphics*/
 /* 7: d3 graphics, same mode as d2*/
 /* 8: d4 graphics, same mode as d2*/
 /* 9: d5 graphics, same mode as d2*/
 /* ...*/
 /* maximum_number_of_surfaces-2: d1 display_write_back420 luma*/
 /* maximum_number_of_surfaces-1: d1 display_write_back420 chroma*/
 /* underlay luma and chroma surface parameters from spreadsheet*/




 if (data->d0_underlay_mode == bw_def_none)
  d0_underlay_enable = false;
 else
  d0_underlay_enable = true;
 if (data->d1_underlay_mode == bw_def_none)
  d1_underlay_enable = false;
 else
  d1_underlay_enable = true;
 data->number_of_underlay_surfaces = d0_underlay_enable + d1_underlay_enable;
 switch (data->underlay_surface_type) {
 case bw_def_420:
  surface_type[0] = bw_def_underlay420_luma;
  surface_type[2] = bw_def_underlay420_luma;
  data->bytes_per_pixel[0] = 1;
  data->bytes_per_pixel[2] = 1;
  surface_type[1] = bw_def_underlay420_chroma;
  surface_type[3] = bw_def_underlay420_chroma;
  data->bytes_per_pixel[1] = 2;
  data->bytes_per_pixel[3] = 2;
  data->lb_size_per_component[0] = dceip->underlay420_luma_lb_size_per_component;
  data->lb_size_per_component[1] = dceip->underlay420_chroma_lb_size_per_component;
  data->lb_size_per_component[2] = dceip->underlay420_luma_lb_size_per_component;
  data->lb_size_per_component[3] = dceip->underlay420_chroma_lb_size_per_component;
  break;
 case bw_def_422:
  surface_type[0] = bw_def_underlay422;
  surface_type[2] = bw_def_underlay422;
  data->bytes_per_pixel[0] = 2;
  data->bytes_per_pixel[2] = 2;
  data->lb_size_per_component[0] = dceip->underlay422_lb_size_per_component;
  data->lb_size_per_component[2] = dceip->underlay422_lb_size_per_component;
  break;
 default:
  surface_type[0] = bw_def_underlay444;
  surface_type[2] = bw_def_underlay444;
  data->bytes_per_pixel[0] = 4;
  data->bytes_per_pixel[2] = 4;
  data->lb_size_per_component[0] = dceip->lb_size_per_component444;
  data->lb_size_per_component[2] = dceip->lb_size_per_component444;
  break;
 }
 if (d0_underlay_enable) {
  switch (data->underlay_surface_type) {
  case bw_def_420:
   data->enable[0] = 1;
   data->enable[1] = 1;
   break;
  default:
   data->enable[0] = 1;
   data->enable[1] = 0;
   break;
  }
 }
 else {
  data->enable[0] = 0;
  data->enable[1] = 0;
 }
 if (d1_underlay_enable) {
  switch (data->underlay_surface_type) {
  case bw_def_420:
   data->enable[2] = 1;
   data->enable[3] = 1;
   break;
  default:
   data->enable[2] = 1;
   data->enable[3] = 0;
   break;
  }
 }
 else {
  data->enable[2] = 0;
  data->enable[3] = 0;
 }
 data->use_alpha[0] = 0;
 data->use_alpha[1] = 0;
 data->use_alpha[2] = 0;
 data->use_alpha[3] = 0;
 data->scatter_gather_enable_for_pipe[0] = vbios->scatter_gather_enable;
 data->scatter_gather_enable_for_pipe[1] = vbios->scatter_gather_enable;
 data->scatter_gather_enable_for_pipe[2] = vbios->scatter_gather_enable;
 data->scatter_gather_enable_for_pipe[3] = vbios->scatter_gather_enable;
 /*underlay0 same and graphics display pipe0*/
 data->interlace_mode[0] = data->interlace_mode[4];
 data->interlace_mode[1] = data->interlace_mode[4];
 /*underlay1 same and graphics display pipe1*/
 data->interlace_mode[2] = data->interlace_mode[5];
 data->interlace_mode[3] = data->interlace_mode[5];
 /*underlay0 same and graphics display pipe0*/
 data->h_total[0] = data->h_total[4];
 data->v_total[0] = data->v_total[4];
 data->h_total[1] = data->h_total[4];
 data->v_total[1] = data->v_total[4];
 /*underlay1 same and graphics display pipe1*/
 data->h_total[2] = data->h_total[5];
 data->v_total[2] = data->v_total[5];
 data->h_total[3] = data->h_total[5];
 data->v_total[3] = data->v_total[5];
 /*underlay0 same and graphics display pipe0*/
 data->pixel_rate[0] = data->pixel_rate[4];
 data->pixel_rate[1] = data->pixel_rate[4];
 /*underlay1 same and graphics display pipe1*/
 data->pixel_rate[2] = data->pixel_rate[5];
 data->pixel_rate[3] = data->pixel_rate[5];
 if ((data->underlay_tiling_mode == bw_def_array_linear_general || data->underlay_tiling_mode == bw_def_array_linear_aligned)) {
  tiling_mode[0] = bw_def_linear;
  tiling_mode[1] = bw_def_linear;
  tiling_mode[2] = bw_def_linear;
  tiling_mode[3] = bw_def_linear;
 }
 else {
  tiling_mode[0] = bw_def_landscape;
  tiling_mode[1] = bw_def_landscape;
  tiling_mode[2] = bw_def_landscape;
  tiling_mode[3] = bw_def_landscape;
 }
 data->lb_bpc[0] = data->underlay_lb_bpc;
 data->lb_bpc[1] = data->underlay_lb_bpc;
 data->lb_bpc[2] = data->underlay_lb_bpc;
 data->lb_bpc[3] = data->underlay_lb_bpc;
 data->compression_rate[0] = bw_int_to_fixed(1);
 data->compression_rate[1] = bw_int_to_fixed(1);
 data->compression_rate[2] = bw_int_to_fixed(1);
 data->compression_rate[3] = bw_int_to_fixed(1);
 data->access_one_channel_only[0] = 0;
 data->access_one_channel_only[1] = 0;
 data->access_one_channel_only[2] = 0;
 data->access_one_channel_only[3] = 0;
 data->cursor_width_pixels[0] = bw_int_to_fixed(0);
 data->cursor_width_pixels[1] = bw_int_to_fixed(0);
 data->cursor_width_pixels[2] = bw_int_to_fixed(0);
 data->cursor_width_pixels[3] = bw_int_to_fixed(0);
 /* graphics surface parameters from spreadsheet*/
 fbc_enabled = false;
 lpt_enabled = false;
 for (i = 4; i <= maximum_number_of_surfaces - 3; i++) {
  if (i < data->number_of_displays + 4) {
   if (i == 4 && data->d0_underlay_mode == bw_def_underlay_only) {
    data->enable[i] = 0;
    data->use_alpha[i] = 0;
   }
   else if (i == 4 && data->d0_underlay_mode == bw_def_blend) {
    data->enable[i] = 1;
    data->use_alpha[i] = 1;
   }
   else if (i == 4) {
    data->enable[i] = 1;
    data->use_alpha[i] = 0;
   }
   else if (i == 5 && data->d1_underlay_mode == bw_def_underlay_only) {
    data->enable[i] = 0;
    data->use_alpha[i] = 0;
   }
   else if (i == 5 && data->d1_underlay_mode == bw_def_blend) {
    data->enable[i] = 1;
    data->use_alpha[i] = 1;
   }
   else {
    data->enable[i] = 1;
    data->use_alpha[i] = 0;
   }
  }
  else {
   data->enable[i] = 0;
   data->use_alpha[i] = 0;
  }
  data->scatter_gather_enable_for_pipe[i] = vbios->scatter_gather_enable;
  surface_type[i] = bw_def_graphics;
  data->lb_size_per_component[i] = dceip->lb_size_per_component444;
  if (data->graphics_tiling_mode == bw_def_array_linear_general || data->graphics_tiling_mode == bw_def_array_linear_aligned) {
   tiling_mode[i] = bw_def_linear;
  }
  else {
   tiling_mode[i] = bw_def_tiled;
  }
  data->lb_bpc[i] = data->graphics_lb_bpc;
  if ((data->fbc_en[i] == 1 && (dceip->argb_compression_support || data->d0_underlay_mode != bw_def_blended))) {
   data->compression_rate[i] = bw_int_to_fixed(vbios->average_compression_rate);
   data->access_one_channel_only[i] = data->lpt_en[i];
  }
  else {
   data->compression_rate[i] = bw_int_to_fixed(1);
   data->access_one_channel_only[i] = 0;
  }
  if (data->fbc_en[i] == 1) {
   fbc_enabled = true;
   if (data->lpt_en[i] == 1) {
    lpt_enabled = true;
   }
  }
  data->cursor_width_pixels[i] = bw_int_to_fixed(vbios->cursor_width);
 }
 /* display_write_back420*/
 data->scatter_gather_enable_for_pipe[maximum_number_of_surfaces - 2] = 0;
 data->scatter_gather_enable_for_pipe[maximum_number_of_surfaces - 1] = 0;
 if (data->d1_display_write_back_dwb_enable == 1) {
  data->enable[maximum_number_of_surfaces - 2] = 1;
  data->enable[maximum_number_of_surfaces - 1] = 1;
 }
 else {
  data->enable[maximum_number_of_surfaces - 2] = 0;
  data->enable[maximum_number_of_surfaces - 1] = 0;
 }
 surface_type[maximum_number_of_surfaces - 2] = bw_def_display_write_back420_luma;
 surface_type[maximum_number_of_surfaces - 1] = bw_def_display_write_back420_chroma;
 data->lb_size_per_component[maximum_number_of_surfaces - 2] = dceip->underlay420_luma_lb_size_per_component;
 data->lb_size_per_component[maximum_number_of_surfaces - 1] = dceip->underlay420_chroma_lb_size_per_component;
 data->bytes_per_pixel[maximum_number_of_surfaces - 2] = 1;
 data->bytes_per_pixel[maximum_number_of_surfaces - 1] = 2;
 data->interlace_mode[maximum_number_of_surfaces - 2] = data->interlace_mode[5];
 data->interlace_mode[maximum_number_of_surfaces - 1] = data->interlace_mode[5];
 data->h_taps[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);
 data->h_taps[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);
 data->v_taps[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);
 data->v_taps[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);
 data->rotation_angle[maximum_number_of_surfaces - 2] = bw_int_to_fixed(0);
 data->rotation_angle[maximum_number_of_surfaces - 1] = bw_int_to_fixed(0);
 tiling_mode[maximum_number_of_surfaces - 2] = bw_def_linear;
 tiling_mode[maximum_number_of_surfaces - 1] = bw_def_linear;
 data->lb_bpc[maximum_number_of_surfaces - 2] = 8;
 data->lb_bpc[maximum_number_of_surfaces - 1] = 8;
 data->compression_rate[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);
 data->compression_rate[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);
 data->access_one_channel_only[maximum_number_of_surfaces - 2] = 0;
 data->access_one_channel_only[maximum_number_of_surfaces - 1] = 0;
 /*assume display pipe1 has dwb enabled*/
 data->h_total[maximum_number_of_surfaces - 2] = data->h_total[5];
 data->h_total[maximum_number_of_surfaces - 1] = data->h_total[5];
 data->v_total[maximum_number_of_surfaces - 2] = data->v_total[5];
 data->v_total[maximum_number_of_surfaces - 1] = data->v_total[5];
 data->pixel_rate[maximum_number_of_surfaces - 2] = data->pixel_rate[5];
 data->pixel_rate[maximum_number_of_surfaces - 1] = data->pixel_rate[5];
 data->src_width[maximum_number_of_surfaces - 2] = data->src_width[5];
 data->src_width[maximum_number_of_surfaces - 1] = data->src_width[5];
 data->src_height[maximum_number_of_surfaces - 2] = data->src_height[5];
 data->src_height[maximum_number_of_surfaces - 1] = data->src_height[5];
 data->pitch_in_pixels[maximum_number_of_surfaces - 2] = data->src_width[5];
 data->pitch_in_pixels[maximum_number_of_surfaces - 1] = data->src_width[5];
 data->h_scale_ratio[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);
 data->h_scale_ratio[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);
 data->v_scale_ratio[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);
 data->v_scale_ratio[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);
 data->stereo_mode[maximum_number_of_surfaces - 2] = bw_def_mono;
 data->stereo_mode[maximum_number_of_surfaces - 1] = bw_def_mono;
 data->cursor_width_pixels[maximum_number_of_surfaces - 2] = bw_int_to_fixed(0);
 data->cursor_width_pixels[maximum_number_of_surfaces - 1] = bw_int_to_fixed(0);
 data->use_alpha[maximum_number_of_surfaces - 2] = 0;
 data->use_alpha[maximum_number_of_surfaces - 1] = 0;
 /*mode check calculations:*/
 /* mode within dce ip capabilities*/
 /* fbc*/
 /* hsr*/
 /* vsr*/
 /* lb size*/
 /*effective scaling source and ratios:*/
 /*for graphics, non-stereo, non-interlace surfaces when the size of the source and destination are the same, only one tap is used*/
 /*420 chroma has half the width, height, horizontal and vertical scaling ratios than luma*/
 /*rotating a graphic or underlay surface swaps the width, height, horizontal and vertical scaling ratios*/
 /*in top-bottom stereo mode there is 2:1 vertical downscaling for each eye*/
 /*in side-by-side stereo mode there is 2:1 horizontal downscaling for each eye*/
 /*in interlace mode there is 2:1 vertical downscaling for each field*/
 /*in panning or bezel adjustment mode the source width has an extra 128 pixels*/
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (bw_equ(data->h_scale_ratio[i], bw_int_to_fixed(1)) && bw_equ(data->v_scale_ratio[i], bw_int_to_fixed(1)) && surface_type[i] == bw_def_graphics && data->stereo_mode[i] == bw_def_mono && data->interlace_mode[i] == 0) {
    data->h_taps[i] = bw_int_to_fixed(1);
    data->v_taps[i] = bw_int_to_fixed(1);
   }
   if (surface_type[i] == bw_def_display_write_back420_chroma || surface_type[i] == bw_def_underlay420_chroma) {
    data->pitch_in_pixels_after_surface_type[i] = bw_div(data->pitch_in_pixels[i], bw_int_to_fixed(2));
    data->src_width_after_surface_type = bw_div(data->src_width[i], bw_int_to_fixed(2));
    data->src_height_after_surface_type = bw_div(data->src_height[i], bw_int_to_fixed(2));
    data->hsr_after_surface_type = bw_div(data->h_scale_ratio[i], bw_int_to_fixed(2));
    data->vsr_after_surface_type = bw_div(data->v_scale_ratio[i], bw_int_to_fixed(2));
   }
   else {
    data->pitch_in_pixels_after_surface_type[i] = data->pitch_in_pixels[i];
    data->src_width_after_surface_type = data->src_width[i];
    data->src_height_after_surface_type = data->src_height[i];
    data->hsr_after_surface_type = data->h_scale_ratio[i];
    data->vsr_after_surface_type = data->v_scale_ratio[i];
   }
   if ((bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270))) && surface_type[i] != bw_def_display_write_back420_luma && surface_type[i] != bw_def_display_write_back420_chroma) {
    data->src_width_after_rotation = data->src_height_after_surface_type;
    data->src_height_after_rotation = data->src_width_after_surface_type;
    data->hsr_after_rotation = data->vsr_after_surface_type;
    data->vsr_after_rotation = data->hsr_after_surface_type;
   }
   else {
    data->src_width_after_rotation = data->src_width_after_surface_type;
    data->src_height_after_rotation = data->src_height_after_surface_type;
    data->hsr_after_rotation = data->hsr_after_surface_type;
    data->vsr_after_rotation = data->vsr_after_surface_type;
   }
   switch (data->stereo_mode[i]) {
   case bw_def_top_bottom:
    data->source_width_pixels[i] = data->src_width_after_rotation;
    data->source_height_pixels = bw_mul(bw_int_to_fixed(2), data->src_height_after_rotation);
    data->hsr_after_stereo = data->hsr_after_rotation;
    data->vsr_after_stereo = bw_mul(bw_int_to_fixed(1), data->vsr_after_rotation);
    break;
   case bw_def_side_by_side:
    data->source_width_pixels[i] = bw_mul(bw_int_to_fixed(2), data->src_width_after_rotation);
    data->source_height_pixels = data->src_height_after_rotation;
    data->hsr_after_stereo = bw_mul(bw_int_to_fixed(1), data->hsr_after_rotation);
    data->vsr_after_stereo = data->vsr_after_rotation;
    break;
   default:
    data->source_width_pixels[i] = data->src_width_after_rotation;
    data->source_height_pixels = data->src_height_after_rotation;
    data->hsr_after_stereo = data->hsr_after_rotation;
    data->vsr_after_stereo = data->vsr_after_rotation;
    break;
   }
   data->hsr[i] = data->hsr_after_stereo;
   if (data->interlace_mode[i]) {
    data->vsr[i] = bw_mul(data->vsr_after_stereo, bw_int_to_fixed(2));
   }
   else {
    data->vsr[i] = data->vsr_after_stereo;
   }
   if (data->panning_and_bezel_adjustment != bw_def_none) {
    data->source_width_rounded_up_to_chunks[i] = bw_add(bw_floor2(bw_sub(data->source_width_pixels[i], bw_int_to_fixed(1)), bw_int_to_fixed(128)), bw_int_to_fixed(256));
   }
   else {
    data->source_width_rounded_up_to_chunks[i] = bw_ceil2(data->source_width_pixels[i], bw_int_to_fixed(128));
   }
   data->source_height_rounded_up_to_chunks[i] = data->source_height_pixels;
  }
 }
 /*mode support checks:*/
 /*the number of graphics and underlay pipes is limited by the ip support*/
 /*maximum horizontal and vertical scale ratio is 4, and should not exceed the number of taps*/
 /*for downscaling with the pre-downscaler, the horizontal scale ratio must be more than the ceiling of one quarter of the number of taps*/
 /*the pre-downscaler reduces the line buffer source by the horizontal scale ratio*/
 /*the number of lines in the line buffer has to exceed the number of vertical taps*/
 /*the size of the line in the line buffer is the product of the source width and the bits per component, rounded up to a multiple of 48*/
 /*the size of the line in the line buffer in the case of 10 bit per component is the product of the source width rounded up to multiple of 8 and 30.023438 / 3, rounded up to a multiple of 48*/
 /*the size of the line in the line buffer in the case of 8 bit per component is the product of the source width rounded up to multiple of 8 and 30.023438 / 3, rounded up to a multiple of 48*/
 /*frame buffer compression is not supported with stereo mode, rotation, or non- 888 formats*/
 /*rotation is not supported with linear of stereo modes*/
 if (dceip->number_of_graphics_pipes >= data->number_of_displays && dceip->number_of_underlay_pipes >= data->number_of_underlay_surfaces && !(dceip->display_write_back_supported == 0 && data->d1_display_write_back_dwb_enable == 1)) {
  pipe_check = bw_def_ok;
 }
 else {
  pipe_check = bw_def_notok;
 }
 hsr_check = bw_def_ok;
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (bw_neq(data->hsr[i], bw_int_to_fixed(1))) {
    if (bw_mtn(data->hsr[i], bw_int_to_fixed(4))) {
     hsr_check = bw_def_hsr_mtn_4;
    }
    else {
     if (bw_mtn(data->hsr[i], data->h_taps[i])) {
      hsr_check = bw_def_hsr_mtn_h_taps;
     }
     else {
      if (dceip->pre_downscaler_enabled == 1 && bw_mtn(data->hsr[i], bw_int_to_fixed(1)) && bw_leq(data->hsr[i], bw_ceil2(bw_div(data->h_taps[i], bw_int_to_fixed(4)), bw_int_to_fixed(1)))) {
       hsr_check = bw_def_ceiling__h_taps_div_4___meq_hsr;
      }
     }
    }
   }
  }
 }
 vsr_check = bw_def_ok;
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (bw_neq(data->vsr[i], bw_int_to_fixed(1))) {
    if (bw_mtn(data->vsr[i], bw_int_to_fixed(4))) {
     vsr_check = bw_def_vsr_mtn_4;
    }
    else {
     if (bw_mtn(data->vsr[i], data->v_taps[i])) {
      vsr_check = bw_def_vsr_mtn_v_taps;
     }
    }
   }
  }
 }
 lb_size_check = bw_def_ok;
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if ((dceip->pre_downscaler_enabled && bw_mtn(data->hsr[i], bw_int_to_fixed(1)))) {
    data->source_width_in_lb = bw_div(data->source_width_pixels[i], data->hsr[i]);
   }
   else {
    data->source_width_in_lb = data->source_width_pixels[i];
   }
   switch (data->lb_bpc[i]) {
   case 8:
    data->lb_line_pitch = bw_ceil2(bw_mul(bw_div(bw_frc_to_fixed(2401171875ul, 100000000), bw_int_to_fixed(3)), bw_ceil2(data->source_width_in_lb, bw_int_to_fixed(8))), bw_int_to_fixed(48));
    break;
   case 10:
    data->lb_line_pitch = bw_ceil2(bw_mul(bw_div(bw_frc_to_fixed(300234375, 10000000), bw_int_to_fixed(3)), bw_ceil2(data->source_width_in_lb, bw_int_to_fixed(8))), bw_int_to_fixed(48));
    break;
   default:
    data->lb_line_pitch = bw_ceil2(bw_mul(bw_int_to_fixed(data->lb_bpc[i]), data->source_width_in_lb), bw_int_to_fixed(48));
    break;
   }
   data->lb_partitions[i] = bw_floor2(bw_div(data->lb_size_per_component[i], data->lb_line_pitch), bw_int_to_fixed(1));
   /* clamp the partitions to the maximum number supported by the lb */
   if ((surface_type[i] != bw_def_graphics || dceip->graphics_lb_nodownscaling_multi_line_prefetching == 1)) {
    data->lb_partitions_max[i] = bw_int_to_fixed(10);
   }
   else {
    data->lb_partitions_max[i] = bw_int_to_fixed(7);
   }
   data->lb_partitions[i] = bw_min2(data->lb_partitions_max[i], data->lb_partitions[i]);
   if (bw_mtn(bw_add(data->v_taps[i], bw_int_to_fixed(1)), data->lb_partitions[i])) {
    lb_size_check = bw_def_notok;
   }
  }
 }
 fbc_check = bw_def_ok;
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i] && data->fbc_en[i] == 1 && (bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270)) || data->stereo_mode[i] != bw_def_mono || data->bytes_per_pixel[i] != 4)) {
   fbc_check = bw_def_invalid_rotation_or_bpp_or_stereo;
  }
 }
 rotation_check = bw_def_ok;
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if ((bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270))) && (tiling_mode[i] == bw_def_linear || data->stereo_mode[i] != bw_def_mono)) {
    rotation_check = bw_def_invalid_linear_or_stereo_mode;
   }
  }
 }
 if (pipe_check == bw_def_ok && hsr_check == bw_def_ok && vsr_check == bw_def_ok && lb_size_check == bw_def_ok && fbc_check == bw_def_ok && rotation_check == bw_def_ok) {
  mode_check = bw_def_ok;
 }
 else {
  mode_check = bw_def_notok;
 }
 /*number of memory channels for write-back client*/
 data->number_of_dram_wrchannels = vbios->number_of_dram_channels;
 data->number_of_dram_channels = vbios->number_of_dram_channels;
 /*modify number of memory channels if lpt mode is enabled*/
 /* low power tiling mode register*/
 /* 0 = use channel 0*/
 /* 1 = use channel 0 and 1*/
 /* 2 = use channel 0,1,2,3*/
 if ((fbc_enabled == 1 && lpt_enabled == 1)) {
  if (vbios->memory_type == bw_def_hbm)
   data->dram_efficiency = bw_frc_to_fixed(5, 10);
  else
   data->dram_efficiency = bw_int_to_fixed(1);


  if (dceip->low_power_tiling_mode == 0) {
   data->number_of_dram_channels = 1;
  }
  else if (dceip->low_power_tiling_mode == 1) {
   data->number_of_dram_channels = 2;
  }
  else if (dceip->low_power_tiling_mode == 2) {
   data->number_of_dram_channels = 4;
  }
  else {
   data->number_of_dram_channels = 1;
  }
 }
 else {
  if (vbios->memory_type == bw_def_hbm)
   data->dram_efficiency = bw_frc_to_fixed(5, 10);
  else
   data->dram_efficiency = bw_frc_to_fixed(8, 10);
 }
 /*memory request size and latency hiding:*/
 /*request size is normally 64 byte, 2-line interleaved, with full latency hiding*/
 /*the display write-back requests are single line*/
 /*for tiled graphics surfaces, or undelay surfaces with width higher than the maximum size for full efficiency, request size is 32 byte in 8 and 16 bpp or if the rotation is orthogonal to the tiling grain. only half is useful of the bytes in the request size in 8 bpp or in 32 bpp if the rotation is orthogonal to the tiling grain.*/
 /*for undelay surfaces with width lower than the maximum size for full efficiency, requests are 4-line interleaved in 16bpp if the rotation is parallel to the tiling grain, and 8-line interleaved with 4-line latency hiding in 8bpp or if the rotation is orthogonal to the tiling grain.*/
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if ((bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270)))) {
    if ((i < 4)) {
     /*underlay portrait tiling mode is not supported*/
     data->orthogonal_rotation[i] = 1;
    }
    else {
     /*graphics portrait tiling mode*/
     if (data->graphics_micro_tile_mode == bw_def_rotated_micro_tiling) {
      data->orthogonal_rotation[i] = 0;
     }
     else {
      data->orthogonal_rotation[i] = 1;
     }
    }
   }
   else {
    if ((i < 4)) {
     /*underlay landscape tiling mode is only supported*/
     if (data->underlay_micro_tile_mode == bw_def_display_micro_tiling) {
      data->orthogonal_rotation[i] = 0;
     }
     else {
      data->orthogonal_rotation[i] = 1;
     }
    }
    else {
     /*graphics landscape tiling mode*/
     if (data->graphics_micro_tile_mode == bw_def_display_micro_tiling) {
      data->orthogonal_rotation[i] = 0;
     }
     else {
      data->orthogonal_rotation[i] = 1;
     }
    }
   }
   if (bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270))) {
    data->underlay_maximum_source_efficient_for_tiling = dceip->underlay_maximum_height_efficient_for_tiling;
   }
   else {
    data->underlay_maximum_source_efficient_for_tiling = dceip->underlay_maximum_width_efficient_for_tiling;
   }
   if (surface_type[i] == bw_def_display_write_back420_luma || surface_type[i] == bw_def_display_write_back420_chroma) {
    data->bytes_per_request[i] = bw_int_to_fixed(64);
    data->useful_bytes_per_request[i] = bw_int_to_fixed(64);
    data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(1);
    data->latency_hiding_lines[i] = bw_int_to_fixed(1);
   }
   else if (tiling_mode[i] == bw_def_linear) {
    data->bytes_per_request[i] = bw_int_to_fixed(64);
    data->useful_bytes_per_request[i] = bw_int_to_fixed(64);
    data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);
    data->latency_hiding_lines[i] = bw_int_to_fixed(2);
   }
   else {
    if (surface_type[i] == bw_def_graphics || (bw_mtn(data->source_width_rounded_up_to_chunks[i], bw_ceil2(data->underlay_maximum_source_efficient_for_tiling, bw_int_to_fixed(256))))) {
     switch (data->bytes_per_pixel[i]) {
     case 8:
      data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);
      data->latency_hiding_lines[i] = bw_int_to_fixed(2);
      if (data->orthogonal_rotation[i]) {
       data->bytes_per_request[i] = bw_int_to_fixed(32);
       data->useful_bytes_per_request[i] = bw_int_to_fixed(32);
      }
      else {
       data->bytes_per_request[i] = bw_int_to_fixed(64);
       data->useful_bytes_per_request[i] = bw_int_to_fixed(64);
      }
      break;
     case 4:
      if (data->orthogonal_rotation[i]) {
       data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);
       data->latency_hiding_lines[i] = bw_int_to_fixed(2);
       data->bytes_per_request[i] = bw_int_to_fixed(32);
       data->useful_bytes_per_request[i] = bw_int_to_fixed(16);
      }
      else {
       data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);
       data->latency_hiding_lines[i] = bw_int_to_fixed(2);
       data->bytes_per_request[i] = bw_int_to_fixed(64);
       data->useful_bytes_per_request[i] = bw_int_to_fixed(64);
      }
      break;
     case 2:
      data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);
      data->latency_hiding_lines[i] = bw_int_to_fixed(2);
      data->bytes_per_request[i] = bw_int_to_fixed(32);
      data->useful_bytes_per_request[i] = bw_int_to_fixed(32);
      break;
     default:
      data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);
      data->latency_hiding_lines[i] = bw_int_to_fixed(2);
      data->bytes_per_request[i] = bw_int_to_fixed(32);
      data->useful_bytes_per_request[i] = bw_int_to_fixed(16);
      break;
     }
    }
    else {
     data->bytes_per_request[i] = bw_int_to_fixed(64);
     data->useful_bytes_per_request[i] = bw_int_to_fixed(64);
     if (data->orthogonal_rotation[i]) {
      data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(8);
      data->latency_hiding_lines[i] = bw_int_to_fixed(4);
     }
     else {
      switch (data->bytes_per_pixel[i]) {
      case 4:
       data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);
       data->latency_hiding_lines[i] = bw_int_to_fixed(2);
       break;
      case 2:
       data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(4);
       data->latency_hiding_lines[i] = bw_int_to_fixed(4);
       break;
      default:
       data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(8);
       data->latency_hiding_lines[i] = bw_int_to_fixed(4);
       break;
      }
     }
    }
   }
  }
 }
 /*requested peak bandwidth:*/
 /*the peak request-per-second bandwidth is the product of the maximum source lines in per line out in the beginning*/
 /*and in the middle of the frame, the ratio of the source width to the line time, the ratio of line interleaving*/
 /*in memory to lines of latency hiding, and the ratio of bytes per pixel to useful bytes per request.*/
 /**/
 /*if the dmif data buffer size holds more than vta_ps worth of source lines, then only vsr is used.*/
 /*the peak bandwidth is the peak request-per-second bandwidth times the request size.*/
 /**/
 /*the line buffer lines in per line out in the beginning of the frame is the vertical filter initialization value*/
 /*rounded up to even and divided by the line times for initialization, which is normally three.*/
 /*the line buffer lines in per line out in the middle of the frame is at least one, or the vertical scale ratio,*/
 /*rounded up to line pairs if not doing line buffer prefetching.*/
 /**/
 /*the non-prefetching rounding up of the vertical scale ratio can also be done up to 1 (for a 0,2 pattern), 4/3 (for a 0,2,2 pattern),*/
 /*6/4 (for a 0,2,2,2 pattern), or 3 (for a 2,4 pattern).*/
 /**/
 /*the scaler vertical filter initialization value is calculated by the hardware as the floor of the average of the*/
 /*vertical scale ratio and the number of vertical taps increased by one.  add one more for possible odd line*/
 /*panning/bezel adjustment mode.*/
 /**/
 /*for the bottom interlace field an extra 50% of the vertical scale ratio is considered for this calculation.*/
 /*in top-bottom stereo mode software has to set the filter initialization value manually and explicitly limit it to 4.*/
 /*furthermore, there is only one line time for initialization.*/
 /**/
 /*line buffer prefetching is done when the number of lines in the line buffer exceeds the number of taps plus*/
 /*the ceiling of the vertical scale ratio.*/
 /**/
 /*multi-line buffer prefetching is only done in the graphics pipe when the scaler is disabled or when upscaling and the vsr <= 0.8.'*/
 /**/
 /*the horizontal blank and chunk granularity factor is indirectly used indicate the interval of time required to transfer the source pixels.*/
 /*the denominator of this term represents the total number of destination output pixels required for the input source pixels.*/
 /*it applies when the lines in per line out is not 2 or 4.  it does not apply when there is a line buffer between the scl and blnd.*/
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   data->v_filter_init[i] = bw_floor2(bw_div((bw_add(bw_add(bw_add(bw_int_to_fixed(1), data->v_taps[i]), data->vsr[i]), bw_mul(bw_mul(bw_int_to_fixed(data->interlace_mode[i]), bw_frc_to_fixed(5, 10)), data->vsr[i]))), bw_int_to_fixed(2)), bw_int_to_fixed(1));
   if (data->panning_and_bezel_adjustment == bw_def_any_lines) {
    data->v_filter_init[i] = bw_add(data->v_filter_init[i], bw_int_to_fixed(1));
   }
   if (data->stereo_mode[i] == bw_def_top_bottom) {
    data->v_filter_init[i] = bw_min2(data->v_filter_init[i], bw_int_to_fixed(4));
   }
   if (data->stereo_mode[i] == bw_def_top_bottom) {
    data->num_lines_at_frame_start = bw_int_to_fixed(1);
   }
   else {
    data->num_lines_at_frame_start = bw_int_to_fixed(3);
   }
   if ((bw_mtn(data->vsr[i], bw_int_to_fixed(1)) && surface_type[i] == bw_def_graphics) || data->panning_and_bezel_adjustment == bw_def_any_lines) {
    data->line_buffer_prefetch[i] = 0;
   }
   else if ((((dceip->underlay_downscale_prefetch_enabled == 1 && surface_type[i] != bw_def_graphics) || surface_type[i] == bw_def_graphics) && (bw_mtn(data->lb_partitions[i], bw_add(data->v_taps[i], bw_ceil2(data->vsr[i], bw_int_to_fixed(1))))))) {
    data->line_buffer_prefetch[i] = 1;
   }
   else {
    data->line_buffer_prefetch[i] = 0;
   }
   data->lb_lines_in_per_line_out_in_beginning_of_frame[i] = bw_div(bw_ceil2(data->v_filter_init[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), data->num_lines_at_frame_start);
   if (data->line_buffer_prefetch[i] == 1) {
    data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_max2(bw_int_to_fixed(1), data->vsr[i]);
   }
   else if (bw_leq(data->vsr[i], bw_int_to_fixed(1))) {
    data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_int_to_fixed(1);
   } else if (bw_leq(data->vsr[i],
     bw_frc_to_fixed(4, 3))) {
    data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_div(bw_int_to_fixed(4), bw_int_to_fixed(3));
   } else if (bw_leq(data->vsr[i],
     bw_frc_to_fixed(6, 4))) {
    data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_div(bw_int_to_fixed(6), bw_int_to_fixed(4));
   }
   else if (bw_leq(data->vsr[i], bw_int_to_fixed(2))) {
    data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_int_to_fixed(2);
   }
   else if (bw_leq(data->vsr[i], bw_int_to_fixed(3))) {
    data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_int_to_fixed(3);
   }
   else {
    data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_int_to_fixed(4);
   }
   if (data->line_buffer_prefetch[i] == 1 || bw_equ(data->lb_lines_in_per_line_out_in_middle_of_frame[i], bw_int_to_fixed(2)) || bw_equ(data->lb_lines_in_per_line_out_in_middle_of_frame[i], bw_int_to_fixed(4))) {
    data->horizontal_blank_and_chunk_granularity_factor[i] = bw_int_to_fixed(1);
   }
   else {
    data->horizontal_blank_and_chunk_granularity_factor[i] = bw_div(data->h_total[i], (bw_div((bw_add(data->h_total[i], bw_div((bw_sub(data->source_width_pixels[i], bw_int_to_fixed(dceip->chunk_width))), data->hsr[i]))), bw_int_to_fixed(2))));
   }
   data->request_bandwidth[i] = bw_div(bw_mul(bw_div(bw_mul(bw_div(bw_mul(bw_max2(data->lb_lines_in_per_line_out_in_beginning_of_frame[i], data->lb_lines_in_per_line_out_in_middle_of_frame[i]), data->source_width_rounded_up_to_chunks[i]), (bw_div(data->h_total[i], data->pixel_rate[i]))), bw_int_to_fixed(data->bytes_per_pixel[i])), data->useful_bytes_per_request[i]), data->lines_interleaved_in_mem_access[i]), data->latency_hiding_lines[i]);
   data->display_bandwidth[i] = bw_mul(data->request_bandwidth[i], data->bytes_per_request[i]);
  }
 }
 /*outstanding chunk request limit*/
 /*if underlay buffer sharing is enabled, the data buffer size for underlay in 422 or 444 is the sum of the luma and chroma data buffer sizes.*/
 /*underlay buffer sharing mode is only permitted in orthogonal rotation modes.*/
 /**/
 /*if there is only one display enabled, the dmif data buffer size for the graphics surface is increased by concatenating the adjacent buffers.*/
 /**/
 /*the memory chunk size in bytes is 1024 for the writeback, and 256 times the memory line interleaving and the bytes per pixel for graphics*/
 /*and underlay.*/
 /**/
 /*the pipe chunk size uses 2 for line interleaving, except for the write back, in which case it is 1.*/
 /*graphics and underlay data buffer size is adjusted (limited) using the outstanding chunk request limit if there is more than one*/
 /*display enabled or if the dmif request buffer is not large enough for the total data buffer size.*/
 /*the outstanding chunk request limit is the ceiling of the adjusted data buffer size divided by the chunk size in bytes*/
 /*the adjusted data buffer size is the product of the display bandwidth and the minimum effective data buffer size in terms of time,*/
 /*rounded up to the chunk size in bytes, but should not exceed the original data buffer size*/
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if ((dceip->dmif_pipe_en_fbc_chunk_tracker + 3 == i && fbc_enabled == 0 && tiling_mode[i] != bw_def_linear)) {
    data->max_chunks_non_fbc_mode[i] = 128 - dmif_chunk_buff_margin;
   }
   else {
    data->max_chunks_non_fbc_mode[i] = 16 - dmif_chunk_buff_margin;
   }
  }
  if (data->fbc_en[i] == 1) {
   max_chunks_fbc_mode = 128 - dmif_chunk_buff_margin;
  }
 }
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   switch (surface_type[i]) {
   case bw_def_display_write_back420_luma:
    data->data_buffer_size[i] = bw_int_to_fixed(dceip->display_write_back420_luma_mcifwr_buffer_size);
    break;
   case bw_def_display_write_back420_chroma:
    data->data_buffer_size[i] = bw_int_to_fixed(dceip->display_write_back420_chroma_mcifwr_buffer_size);
    break;
   case bw_def_underlay420_luma:
    data->data_buffer_size[i] = bw_int_to_fixed(dceip->underlay_luma_dmif_size);
    break;
   case bw_def_underlay420_chroma:
    data->data_buffer_size[i] = bw_div(bw_int_to_fixed(dceip->underlay_chroma_dmif_size), bw_int_to_fixed(2));
    break;
   case bw_def_underlay422:case bw_def_underlay444:
    if (data->orthogonal_rotation[i] == 0) {
     data->data_buffer_size[i] = bw_int_to_fixed(dceip->underlay_luma_dmif_size);
    }
    else {
     data->data_buffer_size[i] = bw_add(bw_int_to_fixed(dceip->underlay_luma_dmif_size), bw_int_to_fixed(dceip->underlay_chroma_dmif_size));
    }
    break;
   default:
    if (data->fbc_en[i] == 1) {
     /*data_buffer_size(i) = max_dmif_buffer_allocated * graphics_dmif_size*/
     if (data->number_of_displays == 1) {
      data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(max_chunks_fbc_mode), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_mul(bw_int_to_fixed(dceip->max_dmif_buffer_allocated), bw_int_to_fixed(dceip->graphics_dmif_size)));
     }
     else {
      data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(max_chunks_fbc_mode), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_int_to_fixed(dceip->graphics_dmif_size));
     }
    }
    else {
     /*the effective dmif buffer size in non-fbc mode is limited by the 16 entry chunk tracker*/
     if (data->number_of_displays == 1) {
      data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(data->max_chunks_non_fbc_mode[i]), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_mul(bw_int_to_fixed(dceip->max_dmif_buffer_allocated), bw_int_to_fixed(dceip->graphics_dmif_size)));
     }
     else {
      data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(data->max_chunks_non_fbc_mode[i]), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_int_to_fixed(dceip->graphics_dmif_size));
     }
    }
    break;
   }
   if (surface_type[i] == bw_def_display_write_back420_luma || surface_type[i] == bw_def_display_write_back420_chroma) {
    data->memory_chunk_size_in_bytes[i] = bw_int_to_fixed(1024);
    data->pipe_chunk_size_in_bytes[i] = bw_int_to_fixed(1024);
   }
   else {
    data->memory_chunk_size_in_bytes[i] = bw_mul(bw_mul(bw_int_to_fixed(dceip->chunk_width), data->lines_interleaved_in_mem_access[i]), bw_int_to_fixed(data->bytes_per_pixel[i]));
    data->pipe_chunk_size_in_bytes[i] = bw_mul(bw_mul(bw_int_to_fixed(dceip->chunk_width), bw_int_to_fixed(dceip->lines_interleaved_into_lb)), bw_int_to_fixed(data->bytes_per_pixel[i]));
   }
  }
 }
 data->min_dmif_size_in_time = bw_int_to_fixed(9999);
 data->min_mcifwr_size_in_time = bw_int_to_fixed(9999);
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (surface_type[i] != bw_def_display_write_back420_luma && surface_type[i] != bw_def_display_write_back420_chroma) {
    if (bw_ltn(bw_div(bw_div(bw_mul(data->data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]), data->display_bandwidth[i]), data->min_dmif_size_in_time)) {
     data->min_dmif_size_in_time = bw_div(bw_div(bw_mul(data->data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]), data->display_bandwidth[i]);
    }
   }
   else {
    if (bw_ltn(bw_div(bw_div(bw_mul(data->data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]), data->display_bandwidth[i]), data->min_mcifwr_size_in_time)) {
     data->min_mcifwr_size_in_time = bw_div(bw_div(bw_mul(data->data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]), data->display_bandwidth[i]);
    }
   }
  }
 }
 data->total_requests_for_dmif_size = bw_int_to_fixed(0);
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i] && surface_type[i] != bw_def_display_write_back420_luma && surface_type[i] != bw_def_display_write_back420_chroma) {
   data->total_requests_for_dmif_size = bw_add(data->total_requests_for_dmif_size, bw_div(data->data_buffer_size[i], data->useful_bytes_per_request[i]));
  }
 }
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (surface_type[i] != bw_def_display_write_back420_luma && surface_type[i] != bw_def_display_write_back420_chroma && dceip->limit_excessive_outstanding_dmif_requests && (data->number_of_displays > 1 || bw_mtn(data->total_requests_for_dmif_size, dceip->dmif_request_buffer_size))) {
    data->adjusted_data_buffer_size[i] = bw_min2(data->data_buffer_size[i], bw_ceil2(bw_mul(data->min_dmif_size_in_time, data->display_bandwidth[i]), data->memory_chunk_size_in_bytes[i]));
   }
   else {
    data->adjusted_data_buffer_size[i] = data->data_buffer_size[i];
   }
  }
 }
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (data->number_of_displays == 1 && data->number_of_underlay_surfaces == 0) {
    /*set maximum chunk limit if only one graphic pipe is enabled*/
    data->outstanding_chunk_request_limit[i] = bw_int_to_fixed(127);
   }
   else {
    data->outstanding_chunk_request_limit[i] = bw_ceil2(bw_div(data->adjusted_data_buffer_size[i], data->pipe_chunk_size_in_bytes[i]), bw_int_to_fixed(1));
    /*clamp maximum chunk limit in the graphic display pipe*/
    if (i >= 4) {
     data->outstanding_chunk_request_limit[i] = bw_max2(bw_int_to_fixed(127), data->outstanding_chunk_request_limit[i]);
    }
   }
  }
 }
 /*outstanding pte request limit*/
 /*in tiling mode with no rotation the sg pte requests are 8 useful pt_es, the sg row height is the page height and the sg page width x height is 64x64 for 8bpp, 64x32 for 16 bpp, 32x32 for 32 bpp*/
 /*in tiling mode with rotation the sg pte requests are only one useful pte, and the sg row height is also the page height, but the sg page width and height are swapped*/
 /*in linear mode the pte requests are 8 useful pt_es, the sg page width is 4096 divided by the bytes per pixel, the sg page height is 1, but there is just one row whose height is the lines of pte prefetching*/
 /*the outstanding pte request limit is obtained by multiplying the outstanding chunk request limit by the peak pte request to eviction limiting ratio, rounding up to integer, multiplying by the pte requests per chunk, and rounding up to integer again*/
 /*if not using peak pte request to eviction limiting, the outstanding pte request limit is the pte requests in the vblank*/
 /*the pte requests in the vblank is the product of the number of pte request rows times the number of pte requests in a row*/
 /*the number of pte requests in a row is the quotient of the source width divided by 256, multiplied by the pte requests per chunk, rounded up to even, multiplied by the scatter-gather row height and divided by the scatter-gather page height*/
 /*the pte requests per chunk is 256 divided by the scatter-gather page width and the useful pt_es per pte request*/
 if (data->number_of_displays > 1 || (bw_neq(data->rotation_angle[4], bw_int_to_fixed(0)) && bw_neq(data->rotation_angle[4], bw_int_to_fixed(180)))) {
  data->peak_pte_request_to_eviction_ratio_limiting = dceip->peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display;
 }
 else {
  data->peak_pte_request_to_eviction_ratio_limiting = dceip->peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation;
 }
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i] && data->scatter_gather_enable_for_pipe[i] == 1) {
   if (tiling_mode[i] == bw_def_linear) {
    data->useful_pte_per_pte_request = bw_int_to_fixed(8);
    data->scatter_gather_page_width[i] = bw_div(bw_int_to_fixed(4096), bw_int_to_fixed(data->bytes_per_pixel[i]));
    data->scatter_gather_page_height[i] = bw_int_to_fixed(1);
    data->scatter_gather_pte_request_rows = bw_int_to_fixed(1);
    data->scatter_gather_row_height = bw_int_to_fixed(dceip->scatter_gather_lines_of_pte_prefetching_in_linear_mode);
   }
   else if (bw_equ(data->rotation_angle[i], bw_int_to_fixed(0)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(180))) {
    data->useful_pte_per_pte_request = bw_int_to_fixed(8);
    switch (data->bytes_per_pixel[i]) {
    case 4:
     data->scatter_gather_page_width[i] = bw_int_to_fixed(32);
     data->scatter_gather_page_height[i] = bw_int_to_fixed(32);
     break;
    case 2:
     data->scatter_gather_page_width[i] = bw_int_to_fixed(64);
     data->scatter_gather_page_height[i] = bw_int_to_fixed(32);
     break;
    default:
     data->scatter_gather_page_width[i] = bw_int_to_fixed(64);
     data->scatter_gather_page_height[i] = bw_int_to_fixed(64);
     break;
    }
    data->scatter_gather_pte_request_rows = bw_int_to_fixed(dceip->scatter_gather_pte_request_rows_in_tiling_mode);
    data->scatter_gather_row_height = data->scatter_gather_page_height[i];
   }
   else {
    data->useful_pte_per_pte_request = bw_int_to_fixed(1);
    switch (data->bytes_per_pixel[i]) {
    case 4:
     data->scatter_gather_page_width[i] = bw_int_to_fixed(32);
     data->scatter_gather_page_height[i] = bw_int_to_fixed(32);
     break;
    case 2:
     data->scatter_gather_page_width[i] = bw_int_to_fixed(32);
     data->scatter_gather_page_height[i] = bw_int_to_fixed(64);
     break;
    default:
     data->scatter_gather_page_width[i] = bw_int_to_fixed(64);
     data->scatter_gather_page_height[i] = bw_int_to_fixed(64);
     break;
    }
    data->scatter_gather_pte_request_rows = bw_int_to_fixed(dceip->scatter_gather_pte_request_rows_in_tiling_mode);
    data->scatter_gather_row_height = data->scatter_gather_page_height[i];
   }
   data->pte_request_per_chunk[i] = bw_div(bw_div(bw_int_to_fixed(dceip->chunk_width), data->scatter_gather_page_width[i]), data->useful_pte_per_pte_request);
   data->scatter_gather_pte_requests_in_row[i] = bw_div(bw_mul(bw_ceil2(bw_mul(bw_div(data->source_width_rounded_up_to_chunks[i], bw_int_to_fixed(dceip->chunk_width)), data->pte_request_per_chunk[i]), bw_int_to_fixed(1)), data->scatter_gather_row_height), data->scatter_gather_page_height[i]);
   data->scatter_gather_pte_requests_in_vblank = bw_mul(data->scatter_gather_pte_request_rows, data->scatter_gather_pte_requests_in_row[i]);
   if (bw_equ(data->peak_pte_request_to_eviction_ratio_limiting, bw_int_to_fixed(0))) {
    data->scatter_gather_pte_request_limit[i] = data->scatter_gather_pte_requests_in_vblank;
   }
   else {
    data->scatter_gather_pte_request_limit[i] = bw_max2(dceip->minimum_outstanding_pte_request_limit, bw_min2(data->scatter_gather_pte_requests_in_vblank, bw_ceil2(bw_mul(bw_mul(bw_div(bw_ceil2(data->adjusted_data_buffer_size[i], data->memory_chunk_size_in_bytes[i]), data->memory_chunk_size_in_bytes[i]), data->pte_request_per_chunk[i]), data->peak_pte_request_to_eviction_ratio_limiting), bw_int_to_fixed(1))));
   }
  }
 }
 /*pitch padding recommended for efficiency in linear mode*/
 /*in linear mode graphics or underlay with scatter gather, a pitch that is a multiple of the channel interleave (256 bytes) times the channel-bank rotation is not efficient*/
 /*if that is the case it is recommended to pad the pitch by at least 256 pixels*/
 data->inefficient_linear_pitch_in_bytes = bw_mul(bw_mul(bw_int_to_fixed(256), bw_int_to_fixed(vbios->number_of_dram_banks)), bw_int_to_fixed(data->number_of_dram_channels));

 /*pixel transfer time*/
 /*the dmif and mcifwr yclk(pclk) required is the one that allows the transfer of all pipe's data buffer size in memory in the time for data transfer*/
 /*for dmif, pte and cursor requests have to be included.*/
 /*the dram data requirement is doubled when the data request size in bytes is less than the dram channel width times the burst size (8)*/
 /*the dram data requirement is also multiplied by the number of channels in the case of low power tiling*/
 /*the page close-open time is determined by trc and the number of page close-opens*/
 /*in tiled mode graphics or underlay with scatter-gather enabled the bytes per page close-open is the product of the memory line interleave times the maximum of the scatter-gather page width and the product of the tile width (8 pixels) times the number of channels times the number of banks.*/
 /*in linear mode graphics or underlay with scatter-gather enabled and inefficient pitch, the bytes per page close-open is the line request alternation slice, because different lines are in completely different 4k address bases.*/
 /*otherwise, the bytes page close-open is the chunk size because that is the arbitration slice.*/
 /*pte requests are grouped by pte requests per chunk if that is more than 1. each group costs a page close-open time for dmif reads*/
 /*cursor requests outstanding are limited to a group of two source lines. each group costs a page close-open time for dmif reads*/
 /*the display reads and writes time for data transfer is the minimum data or cursor buffer size in time minus the mc urgent latency*/
 /*the mc urgent latency is experienced more than one time if the number of dmif requests in the data buffer exceeds the request buffer size plus the request slots reserved for dmif in the dram channel arbiter queues*/
 /*the dispclk required is the maximum for all surfaces of the maximum of the source pixels for first output pixel times the throughput factor, divided by the pixels per dispclk, and divided by the minimum latency hiding minus the dram speed/p-state change latency minus the burst time, and the source pixels for last output pixel, times the throughput factor, divided by the pixels per dispclk, and divided by the minimum latency hiding minus the dram speed/p-state change latency minus the burst time, plus the active time.*/
 /*the data burst time is the maximum of the total page close-open time, total dmif/mcifwr buffer size in memory divided by the dram bandwidth, and the total dmif/mcifwr buffer size in memory divided by the 32 byte sclk data bus bandwidth, each multiplied by its efficiency.*/
 /*the source line transfer time is the maximum for all surfaces of the maximum of the burst time plus the urgent latency times the floor of the data required divided by the buffer size for the fist pixel, and the burst time plus the urgent latency times the floor of the data required divided by the buffer size for the last pixel plus the active time.*/
 /*the source pixels for the first output pixel is 512 if the scaler vertical filter initialization value is greater than 2, and it is 4 times the source width if it is greater than 4.*/
 /*the source pixels for the last output pixel is the source width times the scaler vertical filter initialization value rounded up to even*/
 /*the source data for these pixels is the number of pixels times the bytes per pixel times the bytes per request divided by the useful bytes per request.*/
 data->cursor_total_data = bw_int_to_fixed(0);
 data->cursor_total_request_groups = bw_int_to_fixed(0);
 data->scatter_gather_total_pte_requests = bw_int_to_fixed(0);
 data->scatter_gather_total_pte_request_groups = bw_int_to_fixed(0);
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   data->cursor_total_data = bw_add(data->cursor_total_data, bw_mul(bw_mul(bw_int_to_fixed(2), data->cursor_width_pixels[i]), bw_int_to_fixed(4)));
   if (dceip->large_cursor == 1) {
    data->cursor_total_request_groups = bw_add(data->cursor_total_request_groups, bw_int_to_fixed((dceip->cursor_max_outstanding_group_num + 1)));
   }
   else {
    data->cursor_total_request_groups = bw_add(data->cursor_total_request_groups, bw_ceil2(bw_div(data->cursor_width_pixels[i], dceip->cursor_chunk_width), bw_int_to_fixed(1)));
   }
   if (data->scatter_gather_enable_for_pipe[i]) {
    data->scatter_gather_total_pte_requests = bw_add(data->scatter_gather_total_pte_requests, data->scatter_gather_pte_request_limit[i]);
    data->scatter_gather_total_pte_request_groups = bw_add(data->scatter_gather_total_pte_request_groups, bw_ceil2(bw_div(data->scatter_gather_pte_request_limit[i], bw_ceil2(data->pte_request_per_chunk[i], bw_int_to_fixed(1))), bw_int_to_fixed(1)));
   }
  }
 }
 data->tile_width_in_pixels = bw_int_to_fixed(8);
 data->dmif_total_number_of_data_request_page_close_open = bw_int_to_fixed(0);
 data->mcifwr_total_number_of_data_request_page_close_open = bw_int_to_fixed(0);
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (data->scatter_gather_enable_for_pipe[i] == 1 && tiling_mode[i] != bw_def_linear) {
    data->bytes_per_page_close_open = bw_mul(data->lines_interleaved_in_mem_access[i], bw_max2(bw_mul(bw_mul(bw_mul(bw_int_to_fixed(data->bytes_per_pixel[i]), data->tile_width_in_pixels), bw_int_to_fixed(vbios->number_of_dram_banks)), bw_int_to_fixed(data->number_of_dram_channels)), bw_mul(bw_int_to_fixed(data->bytes_per_pixel[i]), data->scatter_gather_page_width[i])));
   }
   else if (data->scatter_gather_enable_for_pipe[i] == 1 && tiling_mode[i] == bw_def_linear && bw_equ(bw_mod((bw_mul(data->pitch_in_pixels_after_surface_type[i], bw_int_to_fixed(data->bytes_per_pixel[i]))), data->inefficient_linear_pitch_in_bytes), bw_int_to_fixed(0))) {
    data->bytes_per_page_close_open = dceip->linear_mode_line_request_alternation_slice;
   }
   else {
    data->bytes_per_page_close_open = data->memory_chunk_size_in_bytes[i];
   }
   if (surface_type[i] != bw_def_display_write_back420_luma && surface_type[i] != bw_def_display_write_back420_chroma) {
    data->dmif_total_number_of_data_request_page_close_open = bw_add(data->dmif_total_number_of_data_request_page_close_open, bw_div(bw_ceil2(data->adjusted_data_buffer_size[i], data->memory_chunk_size_in_bytes[i]), data->bytes_per_page_close_open));
   }
   else {
    data->mcifwr_total_number_of_data_request_page_close_open = bw_add(data->mcifwr_total_number_of_data_request_page_close_open, bw_div(bw_ceil2(data->adjusted_data_buffer_size[i], data->memory_chunk_size_in_bytes[i]), data->bytes_per_page_close_open));
   }
  }
 }
 data->dmif_total_page_close_open_time = bw_div(bw_mul((bw_add(bw_add(data->dmif_total_number_of_data_request_page_close_open, data->scatter_gather_total_pte_request_groups), data->cursor_total_request_groups)), vbios->trc), bw_int_to_fixed(1000));
 data->mcifwr_total_page_close_open_time = bw_div(bw_mul(data->mcifwr_total_number_of_data_request_page_close_open, vbios->trc), bw_int_to_fixed(1000));
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   data->adjusted_data_buffer_size_in_memory[i] = bw_div(bw_mul(data->adjusted_data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]);
  }
 }
 data->total_requests_for_adjusted_dmif_size = bw_int_to_fixed(0);
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (surface_type[i] != bw_def_display_write_back420_luma && surface_type[i] != bw_def_display_write_back420_chroma) {
    data->total_requests_for_adjusted_dmif_size = bw_add(data->total_requests_for_adjusted_dmif_size, bw_div(data->adjusted_data_buffer_size[i], data->useful_bytes_per_request[i]));
   }
  }
 }
 data->total_dmifmc_urgent_trips = bw_ceil2(bw_div(data->total_requests_for_adjusted_dmif_size, (bw_add(dceip->dmif_request_buffer_size, bw_int_to_fixed(vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel * data->number_of_dram_channels)))), bw_int_to_fixed(1));
 data->total_dmifmc_urgent_latency = bw_mul(vbios->dmifmc_urgent_latency, data->total_dmifmc_urgent_trips);
 data->total_display_reads_required_data = bw_int_to_fixed(0);
 data->total_display_reads_required_dram_access_data = bw_int_to_fixed(0);
 data->total_display_writes_required_data = bw_int_to_fixed(0);
 data->total_display_writes_required_dram_access_data = bw_int_to_fixed(0);
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (surface_type[i] != bw_def_display_write_back420_luma && surface_type[i] != bw_def_display_write_back420_chroma) {
    data->display_reads_required_data = data->adjusted_data_buffer_size_in_memory[i];
    /*for hbm memories, each channel is split into 2 pseudo-channels that are each 64 bits in width.  each*/
    /*pseudo-channel may be read independently of one another.*/
    /*the read burst length (bl) for hbm memories is 4, so each read command will access 32 bytes of data.*/
    /*the 64 or 32 byte sized data is stored in one pseudo-channel.*/
    /*it will take 4 memclk cycles or 8 yclk cycles to fetch 64 bytes of data from the hbm memory (2 read commands).*/
    /*it will take 2 memclk cycles or 4 yclk cycles to fetch 32 bytes of data from the hbm memory (1 read command).*/
    /*for gddr5/ddr4 memories, there is additional overhead if the size of the request is smaller than 64 bytes.*/
    /*the read burst length (bl) for gddr5/ddr4 memories is 8, regardless of the size of the data request.*/
    /*therefore it will require 8 cycles to fetch 64 or 32 bytes of data from the memory.*/
    /*the memory efficiency will be 50% for the 32 byte sized data.*/
    if (vbios->memory_type == bw_def_hbm) {
     data->display_reads_required_dram_access_data = data->adjusted_data_buffer_size_in_memory[i];
    }
    else {
     data->display_reads_required_dram_access_data = bw_mul(data->adjusted_data_buffer_size_in_memory[i], bw_ceil2(bw_div(bw_int_to_fixed((8 * vbios->dram_channel_width_in_bits / 8)), data->bytes_per_request[i]), bw_int_to_fixed(1)));
    }
    data->total_display_reads_required_data = bw_add(data->total_display_reads_required_data, data->display_reads_required_data);
    data->total_display_reads_required_dram_access_data = bw_add(data->total_display_reads_required_dram_access_data, data->display_reads_required_dram_access_data);
   }
   else {
    data->total_display_writes_required_data = bw_add(data->total_display_writes_required_data, data->adjusted_data_buffer_size_in_memory[i]);
    data->total_display_writes_required_dram_access_data = bw_add(data->total_display_writes_required_dram_access_data, bw_mul(data->adjusted_data_buffer_size_in_memory[i], bw_ceil2(bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits), data->bytes_per_request[i]), bw_int_to_fixed(1))));
   }
  }
 }
 data->total_display_reads_required_data = bw_add(bw_add(data->total_display_reads_required_data, data->cursor_total_data), bw_mul(data->scatter_gather_total_pte_requests, bw_int_to_fixed(64)));
 data->total_display_reads_required_dram_access_data = bw_add(bw_add(data->total_display_reads_required_dram_access_data, data->cursor_total_data), bw_mul(data->scatter_gather_total_pte_requests, bw_int_to_fixed(64)));
 for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
  if (data->enable[i]) {
   if (bw_mtn(data->v_filter_init[i], bw_int_to_fixed(4))) {
    data->src_pixels_for_first_output_pixel[i] = bw_mul(bw_int_to_fixed(4), data->source_width_rounded_up_to_chunks[i]);
   }
   else {
    if (bw_mtn(data->v_filter_init[i], bw_int_to_fixed(2))) {
     data->src_pixels_for_first_output_pixel[i] = bw_int_to_fixed(512);
    }
    else {
     data->src_pixels_for_first_output_pixel[i] = bw_int_to_fixed(0);
    }
   }
   data->src_data_for_first_output_pixel[i] = bw_div(bw_mul(bw_mul(data->src_pixels_for_first_output_pixel[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->bytes_per_request[i]), data->useful_bytes_per_request[i]);
   data->src_pixels_for_last_output_pixel[i] = bw_mul(data->source_width_rounded_up_to_chunks[i], bw_max2(bw_ceil2(data->v_filter_init[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), bw_mul(bw_ceil2(data->vsr[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), data->horizontal_blank_and_chunk_granularity_factor[i])));
   data->src_data_for_last_output_pixel[i] = bw_div(bw_mul(bw_mul(bw_mul(data->source_width_rounded_up_to_chunks[i], bw_max2(bw_ceil2(data->v_filter_init[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), data->lines_interleaved_in_mem_access[i])), bw_int_to_fixed(data->bytes_per_pixel[i])), data->bytes_per_request[i]), data->useful_bytes_per_request[i]);
   data->active_time[i] = bw_div(bw_div(data->source_width_rounded_up_to_chunks[i], data->hsr[i]), data->pixel_rate[i]);
  }
 }
 for (i = 0; i <= 2; i++) {
  for (j = 0; j <= 7; j++) {
   data->dmif_burst_time[i][j] = bw_max3(data->dmif_total_page_close_open_time, bw_div(data->total_display_reads_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))), bw_div(data->total_display_reads_required_data, (bw_mul(bw_mul(sclk[j], vbios->data_return_bus_width), bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100)))));
   if (data->d1_display_write_back_dwb_enable == 1) {
    data->mcifwr_burst_time[i][j] = bw_max3(data->mcifwr_total_page_close_open_time, bw_div(data->total_display_writes_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_wrchannels)))), bw_div(data->total_display_writes_required_data, (bw_mul(sclk[j], vbios->data_return_bus_width))));
   }
  }
 }
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