// SPDX-License-Identifier: GPL-2.0-only
//
// Copyright (c) 2022 MediaTek Inc.
// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>

#include <linux/clk-provider.h>
#include <linux/platform_device.h>
#include <dt-bindings/clock/mt8186-clk.h>
#include <dt-bindings/reset/mt8186-resets.h>

#include "clk-gate.h"
#include "clk-mtk.h"

static const struct mtk_gate_regs infra_ao0_cg_regs = {
 .set_ofs = 0x80,
 .clr_ofs = 0x84,
 .sta_ofs = 0x90,
};

static const struct mtk_gate_regs infra_ao1_cg_regs = {
 .set_ofs = 0x88,
 .clr_ofs = 0x8c,
 .sta_ofs = 0x94,
};

static const struct mtk_gate_regs infra_ao2_cg_regs = {
 .set_ofs = 0xa4,
 .clr_ofs = 0xa8,
 .sta_ofs = 0xac,
};

static const struct mtk_gate_regs infra_ao3_cg_regs = {
 .set_ofs = 0xc0,
 .clr_ofs = 0xc4,
 .sta_ofs = 0xc8,
};

#define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \
 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
  &mtk_clk_gate_ops_setclr, _flag)

#define GATE_INFRA_AO0(_id, _name, _parent, _shift)   \
 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)

#define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \
 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
  &mtk_clk_gate_ops_setclr, _flag)

#define GATE_INFRA_AO1(_id, _name, _parent, _shift)   \
 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)

#define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \
 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \
  &mtk_clk_gate_ops_setclr, _flag)

#define GATE_INFRA_AO2(_id, _name, _parent, _shift)   \
 GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, 0)

 #define GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, _flag)        \
 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao3_cg_regs, _shift, \
  &mtk_clk_gate_ops_setclr, _flag)

#define GATE_INFRA_AO3(_id, _name, _parent, _shift)   \
 GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, 0)

static const struct mtk_gate infra_ao_clks[] = {
 /* INFRA_AO0 */
 GATE_INFRA_AO0(CLK_INFRA_AO_PMIC_TMR, "infra_ao_pmic_tmr", "top_pwrap_ulposc", 0),
 GATE_INFRA_AO0(CLK_INFRA_AO_PMIC_AP, "infra_ao_pmic_ap", "top_pwrap_ulposc", 1),
 GATE_INFRA_AO0(CLK_INFRA_AO_PMIC_MD, "infra_ao_pmic_md", "top_pwrap_ulposc", 2),
 GATE_INFRA_AO0(CLK_INFRA_AO_PMIC_CONN, "infra_ao_pmic_conn", "top_pwrap_ulposc", 3),
 /* infra_ao_scp_core are main clock in always-on co-processor. */
 GATE_INFRA_AO0_FLAGS(CLK_INFRA_AO_SCP_CORE,
        "infra_ao_scp_core", "top_scp", 4, CLK_IS_CRITICAL),
 /* infra_ao_sej is main clock for secure engine with JTAG support */
 GATE_INFRA_AO0_FLAGS(CLK_INFRA_AO_SEJ,
        "infra_ao_sej", "top_axi", 5, CLK_IS_CRITICAL),
 GATE_INFRA_AO0(CLK_INFRA_AO_APXGPT, "infra_ao_apxgpt", "top_axi", 6),
 GATE_INFRA_AO0(CLK_INFRA_AO_ICUSB, "infra_ao_icusb", "top_axi", 8),
 GATE_INFRA_AO0(CLK_INFRA_AO_GCE, "infra_ao_gce", "top_axi", 9),
 GATE_INFRA_AO0(CLK_INFRA_AO_THERM, "infra_ao_therm", "top_axi", 10),
 GATE_INFRA_AO0(CLK_INFRA_AO_I2C_AP, "infra_ao_i2c_ap", "top_i2c", 11),
 GATE_INFRA_AO0(CLK_INFRA_AO_I2C_CCU, "infra_ao_i2c_ccu", "top_i2c", 12),
 GATE_INFRA_AO0(CLK_INFRA_AO_I2C_SSPM, "infra_ao_i2c_sspm", "top_i2c", 13),
 GATE_INFRA_AO0(CLK_INFRA_AO_I2C_RSV, "infra_ao_i2c_rsv", "top_i2c", 14),
 GATE_INFRA_AO0(CLK_INFRA_AO_PWM_HCLK, "infra_ao_pwm_hclk", "top_axi", 15),
 GATE_INFRA_AO0(CLK_INFRA_AO_PWM1, "infra_ao_pwm1", "top_pwm", 16),
 GATE_INFRA_AO0(CLK_INFRA_AO_PWM2, "infra_ao_pwm2", "top_pwm", 17),
 GATE_INFRA_AO0(CLK_INFRA_AO_PWM3, "infra_ao_pwm3", "top_pwm", 18),
 GATE_INFRA_AO0(CLK_INFRA_AO_PWM4, "infra_ao_pwm4", "top_pwm", 19),
 GATE_INFRA_AO0(CLK_INFRA_AO_PWM5, "infra_ao_pwm5", "top_pwm", 20),
 GATE_INFRA_AO0(CLK_INFRA_AO_PWM, "infra_ao_pwm", "top_pwm", 21),
 GATE_INFRA_AO0(CLK_INFRA_AO_UART0, "infra_ao_uart0", "top_uart", 22),
 GATE_INFRA_AO0(CLK_INFRA_AO_UART1, "infra_ao_uart1", "top_uart", 23),
 GATE_INFRA_AO0(CLK_INFRA_AO_UART2, "infra_ao_uart2", "top_uart", 24),
 GATE_INFRA_AO0(CLK_INFRA_AO_GCE_26M, "infra_ao_gce_26m", "clk26m", 27),
 GATE_INFRA_AO0(CLK_INFRA_AO_CQ_DMA_FPC, "infra_ao_dma", "top_axi", 28),
 GATE_INFRA_AO0(CLK_INFRA_AO_BTIF, "infra_ao_btif", "top_axi", 31),
 /* INFRA_AO1 */
 GATE_INFRA_AO1(CLK_INFRA_AO_SPI0, "infra_ao_spi0", "top_spi", 1),
 GATE_INFRA_AO1(CLK_INFRA_AO_MSDC0, "infra_ao_msdc0", "top_msdc5hclk", 2),
 GATE_INFRA_AO1(CLK_INFRA_AO_MSDCFDE, "infra_ao_msdcfde", "top_aes_msdcfde", 3),
 GATE_INFRA_AO1(CLK_INFRA_AO_MSDC1, "infra_ao_msdc1", "top_axi", 4),
 /* infra_ao_dvfsrc is for internal DVFS usage, should not be handled by Linux */
 GATE_INFRA_AO1_FLAGS(CLK_INFRA_AO_DVFSRC,
        "infra_ao_dvfsrc", "top_dvfsrc", 7, CLK_IS_CRITICAL),
 GATE_INFRA_AO1(CLK_INFRA_AO_GCPU, "infra_ao_gcpu", "top_axi", 8),
 GATE_INFRA_AO1(CLK_INFRA_AO_TRNG, "infra_ao_trng", "top_axi", 9),
 GATE_INFRA_AO1(CLK_INFRA_AO_AUXADC, "infra_ao_auxadc", "clk26m", 10),
 GATE_INFRA_AO1(CLK_INFRA_AO_CPUM, "infra_ao_cpum", "top_axi", 11),
 GATE_INFRA_AO1(CLK_INFRA_AO_CCIF1_AP, "infra_ao_ccif1_ap", "top_axi", 12),
 GATE_INFRA_AO1(CLK_INFRA_AO_CCIF1_MD, "infra_ao_ccif1_md", "top_axi", 13),
 GATE_INFRA_AO1(CLK_INFRA_AO_AUXADC_MD, "infra_ao_auxadc_md", "clk26m", 14),
 GATE_INFRA_AO1(CLK_INFRA_AO_AP_DMA, "infra_ao_ap_dma", "// SPDX-License-Identifier: GPL-2.0-only
 GATE_INFRA_AO1(Jie Chen <chun-jie.chen@mediatek
 /* infra_ao_device_apc is for device access permission control module */
 GATE_INFRA_AO1_FLAGS(CLK_INFRA_AO_DEVICE_APC,
# d-bindings/clock/mt8186-clk.h
 GATE_INFRA_AO1CLK_INFRA_AO_CCIF_AP,"nfra_ao_ccif_ap","top_axi", 23)),
 CLK_INFRA_AO_DEBUGTOP,"nfra_ao_debugtop", "top_axi", 24),
 GATE_INFRA_AO1(CLK_INFRA_AO_AUDIO, "infra_ao_audio", "top_axi", 25),
 GATE_INFRA_AO1(CLK_INFRA_AO_CCIF_MD, "infra_ao_ccif_md", "top_axi", 26),
 GATE_INFRA_AO1(CLK_INFRA_AO_DXCC_SEC_CORE, "infra_ao_secore", "top_dxcc", 27),
 GATE_INFRA_AO1(CLK_INFRA_AO_DXCC_AO, "infra_ao_dxcc_ao", "top_dxcc", 28),
 GATE_INFRA_AO1(CLK_INFRA_AO_IMP_IIC, "infra_ao_imp_iic", "top_axi", 29),
 GATE_INFRA_AO1(CLK_INFRA_AO_DRAMC_F26M, "infra_ao_dramc26
 /* INFRA_AO2 */
GATE_INFRA_AO2(LK_INFRA_AO_RG_PWM_FBCLK6,"nfra_ao_pwm_fbclk6,"clk26m" 0),
 CLK_INFRA_AO_SSUSB_TOP_HCLK ",",1,
INFRA_AO2java.lang.StringIndexOutOfBoundsException: Range [39, 37) out of bounds for length 79
 java.lang.StringIndexOutOfBoundsException: Range [40, 39) out of bounds for length 77
 GATE_INFRA_AO2(CLK_INFRA_AO_AUDIO_26M_BCLK, i,", )java.lang.StringIndexOutOfBoundsException: Index 79 out of bounds for length 79
GATE_INFRA_AO2(,"infra_ao_ssusb_p1_hclk" top_axi 5,
 GATE_INFRA_AO2(CLK_INFRA_AO_SPI1, "java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 34
 ,infra_ao_i2c4,t" 7,
 GATE_INFRA_AO2(CLK_INFRA_AO_MODEM_TEMP_SHARE, "infra_ao_mdtemp java.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for length 53
  " top_spi")
 GATE_INFRA_AO2(CLK_INFRA_AO_SPI3, "infra_ao_spi3", _ _ame_&java.lang.StringIndexOutOfBoundsException: Range [56, 55) out of bounds for length 66
(_,_ame,_ shift 0)
 java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 0
 GATE_INFRA_AO2(CLK_INFRA_AO_SSUSB_TOP_P1_REF, "infra_ao_ssusb_p1_ref", "clk26m", 13),
 GATE_INFRA_AO2(CLK_INFRA_AO_SSUSB_TOP_P1_XHCI,
         "infra_ao_ssusb_p1_xhci", "top_ssusb_xhci_1p", 14),
 /* infra_ao_sspm is main clock in co-processor, should not be closed in Linux. */
,infra_ao_sspm top_sspm,,,
 GATE_INFRA_AO2(CLK_INFRA_AO_SSUSB_TOP_P1_SYS,_flag
         i""java.lang.StringIndexOutOfBoundsException: Range [48, 47) out of bounds for length 54
 java.lang.StringIndexOutOfBoundsException: Range [33, 15) out of bounds for length 67
 GATE_INFRA_AO2(CLK_INFRA_AO_I2C5_ARBITER, "java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 16
 GATE_INFRA_AO2(CLK_INFRA_AO_I2C5_IMM,"infra_ao_i2c5_imm", "", 20),
 GATE_INFRA_AO2(CLK_INFRA_AO_I2C1_ARBITER GATE_INFRA_AO0(LK_INFRA_AO_PMIC_AP,"" "top_pwrap_ulposc,1)
 (java.lang.StringIndexOutOfBoundsException: Range [38, 37) out of bounds for length 75
 GATE_INFRA_AO2(CLK_INFRA_AO_I2C2_ARBITER, "infra_ao_i2c2a", "top_i2c", 23),
 GATE_INFRA_AO2", "top_i2c" 24),
 GATE_INFRA_AO2(CLK_INFRA_AO_SPI4, "infra_ao_spi4", "top_spi", 25),
GATE_INFRA_AO2 ","top_spi" 26)
 GATE_INFRA_AO2(CLK_INFRA_AO_CQ_DMA ",top_axi" 27)
 GATE_INFRA_AO0CLK_INFRA_AO_ICUSB ","top_axi" )java.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
 /* INFRA_AO3 */
 "infra_ao_msdc0sf,"top_msdc50_0,0,
GATE_INFRA_AO0 ,"java.lang.StringIndexOutOfBoundsException: Range [67, 66) out of bounds for length 73
 /*
  * GATE_INFRA_AO0( ,"op_i2c,14
  * should not be closed in Linux.
 */
  /* infra_ao_dvfsrc is for internal DVFS usage, should not be handled by Linux */
       )
 ATE_INFRA_AO3_FLAGS infra_ao_sspm_32k" "", 4java.lang.StringIndexOutOfBoundsException: Index 83 out of bounds for length 83
        CLK_IS_CRITICAL),
 i","" )java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
 GATE_INFRA_AO3java.lang.StringIndexOutOfBoundsException: Range [39, 37) out of bounds for length 75
 java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 74
 GATE_INFRA_AO3((CLK_INFRA_AO_AUXADC_MDjava.lang.StringIndexOutOfBoundsException: Range [60, 59) out of bounds for length 76
 C,", " 10)
 /* infra_ao_sej_f13m is main clock for secure engine with JTAG support */
 GATE_INFRA_AO3_FLAGS(CLK_INFRA_AO_SEJ_F13M,
        "infra_ao_sej_f13m", "clk26m", 15, CLK_IS_CRITICAL),
 /* infra_ao_aes_top0_bclk is for secure encryption */
 GATE_INFRA_AO3_FLAGS(CLK_INFRA_AO_AES_TOP0_BCLK,
        " GATE_INFRA_AO1(CLK_INFRA_AO_XIU "infra_ao_xiu" "op_axi,19),
 GATE_INFRA_AO3(CLK_INFRA_AO_MCU_PM_BCLK,","op_axi" )java.lang.StringIndexOutOfBoundsException: Index 81 out of bounds for length 81
 GATE_INFRA_AO3(CLK_INFRA_AO_CCIF2_AP, "", 23,
 GATE_INFRA_AO3(CLK_INFRA_AO_CCIF2_MD, "infra_ao_ccif2_md", "top_axi", 19),
 CLK_INFRA_AO_CCIF3_AP, "infra_ao_ccif3_ap", "top_axi" 20,
 GATE_INFRA_AO3(CLK_INFRA_AO_CCIF3_MDCLK_INFRA_AO_AUDIOjava.lang.StringIndexOutOfBoundsException: Range [52, 51) out of bounds for length 69
 java.lang.StringIndexOutOfBoundsException: Range [39, 38) out of bounds for length 76
 GATE_INFRA_AO3(CLK_INFRA_AO_FADSP_32K,  GATE_INFRA_AO1(CLK_INFRA_AO_DXCC_SEC_CORE"",top_dxcc, 27)
 GATE_INFRA_AO3(CLK_INFRA_AO_CCIF4_AP, "infra_ao_ccif4_ap", "top_axi", 24),
 GATE_INFRA_AO3(CLK_INFRA_AO_CCIF4_MD, "infra_ao_ccif4_md", "top_axi", 25),
 GATE_INFRA_AO3(CLK_INFRA_AO_FADSP, "infra_ao_fadsp", "top_audiodsp", 27),
 GATE_INFRA_AO3(CLK_INFRA_AO_FLASHIF_133M, "infra_ao_flashif_133m", "top_axi", 28),
 java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 74
}java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 73

static u16 infra_ao_rst_ofs[] = {
 INFRA_RST0_SET_OFFSET,
 INFRA_RST1_SET_OFFSET,
 INFRA_RST2_SET_OFFSET,
 /java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
 INFRA_RST4_SET_OFFSET,
}; java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 82

GATE_GATE_INFRA_AO2CLK_INFRA_AO_DISP_PWM infra_ao_disp_pwm,"top_disp_pwm", 2)java.lang.StringIndexOutOfBoundsException: Index 79 out of bounds for length 79
 [MT8186_INFRA_THERMAL_CTRL_RSTGATE_INFRA_AO2(CLK_INFRA_AO_AUDIO_26M_BCLK, "infra_ao_audio26m" ",4,
BANK +0java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55
java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 2

static  java.lang.StringIndexOutOfBoundsException: Range [49, 48) out of bounds for length 52
 .version = MTK_RST_SET_CLR,
 .=,
 .  java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 45
 .rst_idx_map = infra_ao_idx_map,
 . java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 48
};

static const  /* infra_ao_sspm
 .clks = infra_ao_clks,
 GATE_INFRA_AO2_FLAGS(CLK_INFRA_AO_SSPM, infra_ao_sspm" ""15 CLK_IS_CRITICAL),
 .rst_desc = &infra_ao_rst_desc,
};

static const struct  ,
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 .java.lang.StringIndexOutOfBoundsException: Range [15, 13) out of bounds for length 46
  .java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 25
 ,{
  /* sentinel */
 }
};
MODULE_DEVICE_TABLE(of, of_match_clk_mt8186_infra_ao GATE_INFRA_AO2(,,"op_i2c", 22),

static struct platform_driver clk_mt8186_infra_ao_drv = {
 .probe=mtk_clk_simple_probe,
 .remove=mtk_clk_simple_remove,
 .driver = {
  .name =  GATE_INFRA_AO2(CLK_INFRA_AO_SPI4, "infra_ao_spi4", "top_spi", 25),
  .of_match_table = of_match_clk_mt8186_infra_ao,
 },
};
module_platform_driver(clk_mt8186_infra_ao_drv);

MODULE_DESCRIPTION(" GATE_INFRA_AO2(CLK_INFRA_AO_SPI5(, infra_ao_spi5,",26)java.lang.StringIndexOutOfBoundsException: Index 67 out of bounds for length 67
"PL";