/***********************license start***************
* Author : Cavium Networks
*
* Contact : support @ caviumnetworks . com
* This file is part of the OCTEON SDK
*
* Copyright ( c ) 2003 - 2008 Cavium Networks
*
* This file is free software ; you can redistribute it and / or modify
* it under the terms of the GNU General Public License , Version 2 , as
* published by the Free Software Foundation .
*
* This file is distributed in the hope that it will be useful , but
* AS - IS and WITHOUT ANY WARRANTY ; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE , TITLE , or
* NONINFRINGEMENT . See the GNU General Public License for more
* details .
*
* You should have received a copy of the GNU General Public License
* along with this file ; if not , write to the Free Software
* Foundation , Inc . , 51 Franklin St , Fifth Floor , Boston , MA 02110 - 1301 USA
* or visit http : //www.gnu.org/licenses/.
*
* This file may also be available under a different license from Cavium .
* Contact Cavium Networks for more information
***********************license end**************************************/
/**
*
* Helper functions to abstract board specific data about
* network ports from the rest of the cvmx - helper files .
*
*/
#ifndef __CVMX_HELPER_BOARD_H__
#define __CVMX_HELPER_BOARD_H__
#include <asm /octeon/cvmx-helper.h>
enum cvmx_helper_board_usb_clock_types {
USB_CLOCK_TYPE_REF_12,
USB_CLOCK_TYPE_REF_24,
USB_CLOCK_TYPE_REF_48,
USB_CLOCK_TYPE_CRYSTAL_12,
};
typedef enum {
set_phy_link_flags_autoneg = 0 x1,
set_phy_link_flags_flow_control_dont_touch = 0 x0 << 1 ,
set_phy_link_flags_flow_control_enable = 0 x1 << 1 ,
set_phy_link_flags_flow_control_disable = 0 x2 << 1 ,
set_phy_link_flags_flow_control_mask = 0 x3 << 1 , /* Mask for 2 bit wide flow control field */
} cvmx_helper_board_set_phy_link_flags_types_t;
/*
* Fake IPD port , the RGMII / MII interface may use different PHY , use
* this macro to return appropriate MIX address to read the PHY .
*/
#define CVMX_HELPER_BOARD_MGMT_IPD_PORT -10
/**
* Return the MII PHY address associated with the given IPD
* port . A result of - 1 means there isn ' t a MII capable PHY
* connected to this port . On chips supporting multiple MII
* busses the bus number is encoded in bits < 15 : 8 > .
*
* This function must be modified for every new Octeon board .
* Internally it uses switch statements based on the cvmx_sysinfo
* data to determine board types and revisions . It relies on the
* fact that every Octeon board receives a unique board type
* enumeration from the bootloader .
*
* @ ipd_port : Octeon IPD port to get the MII address for .
*
* Returns MII PHY address and bus number or - 1 .
*/
extern int cvmx_helper_board_get_mii_address(int ipd_port);
/**
* This function is the board specific method of determining an
* ethernet ports link speed . Most Octeon boards have Marvell PHYs
* and are handled by the fall through case . This function must be
* updated for boards that don ' t have the normal Marvell PHYs .
*
* This function must be modified for every new Octeon board .
* Internally it uses switch statements based on the cvmx_sysinfo
* data to determine board types and revisions . It relies on the
* fact that every Octeon board receives a unique board type
* enumeration from the bootloader .
*
* @ ipd_port : IPD input port associated with the port we want to get link
* status for .
*
* Returns The ports link status . If the link isn ' t fully resolved , this must
* return zero .
*/
extern union cvmx_helper_link_info __cvmx_helper_board_link_get(int ipd_port);
/**
* This function is called by cvmx_helper_interface_probe ( ) after it
* determines the number of ports Octeon can support on a specific
* interface . This function is the per board location to override
* this value . It is called with the number of ports Octeon might
* support and should return the number of actual ports on the
* board .
*
* This function must be modified for every new Octeon board .
* Internally it uses switch statements based on the cvmx_sysinfo
* data to determine board types and revisions . It relies on the
* fact that every Octeon board receives a unique board type
* enumeration from the bootloader .
*
* @ interface : Interface to probe
* @ supported_ports :
* Number of ports Octeon supports .
*
* Returns Number of ports the actual board supports . Many times this will
* simple be " support_ports " .
*/
extern int __cvmx_helper_board_interface_probe(int interface,
int supported_ports);
enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(void );
#endif /* __CVMX_HELPER_BOARD_H__ */
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