/* SPDX-License-Identifier: GPL-2.0-or-later* * - * - mode : asm - * - * * * * head . S - - This file contains the initial boot code for the * * Linux / 68 k kernel . * * * * Copyright 1993 by Hamish Macdonald * * * * 68040 fixes by Michael Rausch * * 68060 fixes by Roman Hodek * * MMU cleanup by Randy Thelen * * Final MMU cleanup by Roman Zippel * * * * Atari support by Andreas Schwab , using ideas of Robert de Vries * * and Bjoern Brauel * * VME Support by Richard Hirst * * * * 94 / 11 / 14 Andreas Schwab : put kernel at PAGESIZE * * 94 / 11 / 18 Andreas Schwab : remove identity mapping of STRAM for Atari * * + + Bjoern & Roman : ATARI - 68040 support for the Medusa * * 95 / 11 / 18 Richard Hirst : Added MVME166 support * * 96 / 04 / 26 Guenther Kelleter : fixed identity mapping for Falcon with * * Magnum - and FX - alternate ram * * 98 / 04 / 25 Phil Blundell : added HP300 support * * 1998 / 08 / 30 David Kilzer : Added support for font_desc structures * * for linux - 2 . 1 . 115 * * 1999 / 02 / 11 Richard Zidlicky : added Q40 support ( initial version 99 / 01 / 01 ) * * 2004 / 05 / 13 Kars de Jong : Finalised HP300 support
/* * Linux startup code . * * At this point , the boot loader has : * Disabled interrupts * Disabled caches * Put us in supervisor state . * * The kernel setup code takes the following steps : * . Raise interrupt level * . Set up initial kernel memory mapping . * . This sets up a mapping of the 4 M of memory the kernel is located in . * . It also does a mapping of any initial machine specific areas . * . Enable the MMU * . Enable cache memories * . Jump to kernel startup * * Much of the file restructuring was to accomplish : * 1 ) Remove register dependency through - out the file . * 2 ) Increase use of subroutines to perform functions * 3 ) Increase readability of the code * * Of course , readability is a subjective issue , so it will never be * argued that that goal was accomplished . It was merely a goal . * A key way to help make code more readable is to give good * documentation . So , the first thing you will find is exhaustive * write - ups on the structure of the file , and the features of the * functional subroutines . * * General Structure : * - - - - - - - - - - - - - - - - - - * Without a doubt the single largest chunk of head . S is spent * mapping the kernel and I / O physical space into the logical range * for the kernel . * There are new subroutines and data structures to make MMU * support cleaner and easier to understand . * First , you will find a routine call " mmu_map " which maps * a logical to a physical region for some length given a cache * type on behalf of the caller . This routine makes writing the * actual per - machine specific code very simple . * A central part of the code , but not a subroutine in itself , * is the mmu_init code which is broken down into mapping the kernel * ( the same for all machines ) and mapping machine - specific I / O * regions . * Also , there will be a description of engaging the MMU and * caches . * You will notice that there is a chunk of code which * can emit the entire MMU mapping of the machine . This is present * only in debug modes and can be very helpful . * Further , there is a new console driver in head . S that is * also only engaged in debug mode . Currently , it ' s only supported * on the Macintosh class of machines . However , it is hoped that * others will plug - in support for specific machines . * * # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # * * mmu_map * - - - - - - - * mmu_map was written for two key reasons . First , it was clear * that it was very difficult to read the previous code for mapping * regions of memory . Second , the Macintosh required such extensive * memory allocations that it didn ' t make sense to propagate the * existing code any further . * mmu_map requires some parameters : * * mmu_map ( logical , physical , length , cache_type ) * * While this essentially describes the function in the abstract , you ' ll * find more indepth description of other parameters at the implementation site . * * mmu_get_root_table_entry * - - - - - - - - - - - - - - - - - - - - - - - - * mmu_get_ptr_table_entry * - - - - - - - - - - - - - - - - - - - - - - - * mmu_get_page_table_entry * - - - - - - - - - - - - - - - - - - - - - - - - * * These routines are used by other mmu routines to get a pointer into * a table , if necessary a new table is allocated . These routines are working * basically like pmd_alloc ( ) and pte_alloc ( ) in < asm / pgtable . h > . The root * table needs of course only to be allocated once in mmu_get_root_table_entry , * so that here also some mmu specific initialization is done . The second page * at the start of the kernel ( the first page is unmapped later ) is used for * the kernel_pg_dir . It must be at a position known at link time ( as it ' s used * to initialize the init task struct ) and since it needs special cache * settings , it ' s the easiest to use this page , the rest of the page is used * for further pointer tables . * mmu_get_page_table_entry allocates always a whole page for page tables , this * means 1024 pages and so 4 MB of memory can be mapped . It doesn ' t make sense * to manage page tables in smaller pieces as nearly all mappings have that * size . * * # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # * * * # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # * * mmu_engage * - - - - - - - - - - * Thanks to a small helping routine enabling the mmu got quite simple * and there is only one way left . mmu_engage makes a complete a new mapping * that only includes the absolute necessary to be able to jump to the final * position and to restore the original mapping . * As this code doesn ' t need a transparent translation register anymore this * means all registers are free to be used by machines that needs them for * other purposes . * * # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # * * mmu_print * - - - - - - - - - * This algorithm will print out the page tables of the system as * appropriate for an 030 or an 040 . This is useful for debugging purposes * and as such is enclosed in # ifdef MMU_PRINT / # endif clauses . * * # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # * * console_init * - - - - - - - - - - - - * The console is also able to be turned off . The console in head . S * is specifically for debugging and can be very useful . It is surrounded by * # ifdef / # endif clauses so it doesn ' t have to ship in known - good * kernels . It ' s basic algorithm is to determine the size of the screen * ( in height / width and bit depth ) and then use that information for * displaying an 8 x8 font or an 8 x16 ( widthxheight ) . I prefer the 8 x8 for * debugging so I can see more good data . But it was trivial to add support * for both fonts , so I included it . * Also , the algorithm for plotting pixels is abstracted so that in * theory other platforms could add support for different kinds of frame * buffers . This could be very useful . * * console_put_penguin * - - - - - - - - - - - - - - - - - - - * An important part of any Linux bring up is the penguin and there ' s * nothing like getting the Penguin on the screen ! This algorithm will work * on any machine for which there is a console_plot_pixel . * * console_scroll * - - - - - - - - - - - - - - * My hope is that the scroll algorithm does the right thing on the * various platforms , but it wouldn ' t be hard to add the test conditions * and new code if it doesn ' t . * * console_putc * - - - - - - - - - - - - - * * # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # * * Register usage has greatly simplified within head . S . Every subroutine * saves and restores all registers that it modifies ( except it returns a * value in there of course ) . So the only register that needs to be initialized * is the stack pointer . * All other init code and data is now placed in the init section , so it will * be automatically freed at the end of the kernel initialization . * * # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # * * options * - - - - - - - * There are many options available in a build of this file . I ' ve * taken the time to describe them here to save you the time of searching * for them and trying to understand what they mean . * * CONFIG_xxx : These are the obvious machine configuration defines created * during configuration . These are defined in autoconf . h . * * CONSOLE_DEBUG : Only supports a Mac frame buffer but could easily be * extended to support other platforms . * * TEST_MMU : This is a test harness for running on any given machine but * getting an MMU dump for another class of machine . The classes of machines * that can be tested are any of the makes ( Atari , Amiga , Mac , VME , etc . ) * and any of the models ( 030 , 040 , 060 , etc . ) . * * NOTE : TEST_MMU is NOT permanent ! It is scheduled to be removed * When head . S boots on Atari , Amiga , Macintosh , and VME * machines . At that point the underlying logic will be * believed to be solid enough to be trusted , and TEST_MMU * can be dropped . Do note that that will clean up the * head . S code significantly as large blocks of # if / # else * clauses can be removed . * * MMU_NOCACHE_KERNEL : On the Macintosh platform there was an inquiry into * determing why devices don ' t appear to work . A test case was to remove * the cacheability of the kernel bits . * * MMU_PRINT : There is a routine built into head . S that can display the * MMU data structures . It outputs its result through the serial_putc * interface . So where ever that winds up driving data , that ' s where the * mmu struct will appear . * * SERIAL_DEBUG : There are a series of putc ( ) macro statements * scattered through out the code to give progress of status to the * person sitting at the console . This constant determines whether those * are used . * * DEBUG : This is the standard DEBUG flag that can be set for building * the kernel . It has the effect adding additional tests into * the code . * * FONT_6x11 : * FONT_8x8 : * FONT_8x16 : * In theory these could be determined at run time or handed * over by the booter . But , let ' s be real , it ' s a fine hard * coded value . ( But , you will notice the code is run - time * flexible !) A pointer to the font's struct font_desc * is kept locally in Lconsole_font . It is used to determine * font size information dynamically . * * Atari constants : * USE_PRINTER : Use the printer port for serial debug . * USE_SCC_B : Use the SCC port A ( Serial2 ) for serial debug . * USE_SCC_A : Use the SCC port B ( Modem2 ) for serial debug . * USE_MFP : Use the ST - MFP port ( Modem1 ) for serial debug . * * Macintosh constants : * MAC_USE_SCC_A : Use SCC port A ( modem ) for serial debug . * MAC_USE_SCC_B : Use SCC port B ( printer ) for serial debug .
#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/pgtable.h>
#include <asm/bootinfo.h>
#include <asm/bootinfo-amiga.h>
#include <asm/bootinfo-atari.h>
#include <asm/bootinfo-hp300.h>
#include <asm/bootinfo-mac.h>
#include <asm/bootinfo-q40.h>
#include <asm/bootinfo-virt.h>
#include <asm/bootinfo-vme.h>
#include <asm/setup.h>
#include <asm/entry.h>
#include <asm/page.h>
#include <asm/asm-offsets.h>
#ifdef CONFIG_MAC
# include <asm/machw.h>
#endif
#ifdef CONFIG_EARLY_PRINTK
# define SERIAL_DEBUG
# if defined(CONFIG_MAC) && defined(CONFIG_FONT_SUPPORT)
# define CONSOLE_DEBUG
# endif
#endif
#undef MMU_PRINT
#undef MMU_NOCACHE_KERNEL
#undef DEBUG
/* * For the head . S console , there are three supported fonts , 6 x11 , 8 x16 and 8 x8 . * The 8 x8 font is harder to read but fits more on the screen .
#define FONT_8x8
/* default */
/* #define FONT_8x16 */ /* 2nd choice */
/* #define FONT_6x11 */ /* 3rd choice */
.globl kernel_pg_dir
.globl availmem
.globl m68k_init_mapped_size
.globl m68k_pgtable_cachemode
.globl m68k_supervisor_cachemode
#ifdef CONFIG_MVME16x
.globl mvme_bdid
#endif
#ifdef CONFIG_Q40
.globl q40_mem_cptr
#endif
CPUTYPE_040 =
1 /* indicates an 040 */
CPUTYPE_060 =
2 /* indicates an 060 */
CPUTYPE_0460 =
3 /* if either above are set, this is set */
CPUTYPE_020 =
4 /* indicates an 020 */
/* Translation control register */
TC_ENABLE =
0 x8000
TC_PAGE8K =
0 x4000
TC_PAGE4K =
0 x0000
/* Transparent translation registers */
TTR_ENABLE =
0 x8000
/* enable transparent translation */
TTR_ANYMODE =
0 x4000
/* user and kernel mode access */
TTR_KERNELMODE =
0 x2000
/* only kernel mode access */
TTR_USERMODE =
0 x0000
/* only user mode access */
TTR_CI =
0 x0400
/* inhibit cache */
TTR_RW =
0 x0200
/* read/write mode */
TTR_RWM =
0 x0100
/* read/write mask */
TTR_FCB2 =
0 x0040
/* function code base bit 2 */
TTR_FCB1 =
0 x0020
/* function code base bit 1 */
TTR_FCB0 =
0 x0010
/* function code base bit 0 */
TTR_FCM2 =
0 x0004
/* function code mask bit 2 */
TTR_FCM1 =
0 x0002
/* function code mask bit 1 */
TTR_FCM0 =
0 x0001
/* function code mask bit 0 */
/* Cache Control registers */
CC6_ENABLE_D =
0 x80000000
/* enable data cache (680[46]0) */
CC6_FREEZE_D =
0 x40000000
/* freeze data cache (68060) */
CC6_ENABLE_SB =
0 x20000000
/* enable store buffer (68060) */
CC6_PUSH_DPI =
0 x10000000
/* disable CPUSH invalidation (68060) */
CC6_HALF_D =
0 x08000000
/* half-cache mode for data cache (68060) */
CC6_ENABLE_B =
0 x00800000
/* enable branch cache (68060) */
CC6_CLRA_B =
0 x00400000
/* clear all entries in branch cache (68060) */
CC6_CLRU_B =
0 x00200000
/* clear user entries in branch cache (68060) */
CC6_ENABLE_I =
0 x00008000
/* enable instruction cache (680[46]0) */
CC6_FREEZE_I =
0 x00004000
/* freeze instruction cache (68060) */
CC6_HALF_I =
0 x00002000
/* half-cache mode for instruction cache (68060) */
CC3_ALLOC_WRITE =
0 x00002000
/* write allocate mode(68030) */
CC3_ENABLE_DB =
0 x00001000
/* enable data burst (68030) */
CC3_CLR_D =
0 x00000800
/* clear data cache (68030) */
CC3_CLRE_D =
0 x00000400
/* clear entry in data cache (68030) */
CC3_FREEZE_D =
0 x00000200
/* freeze data cache (68030) */
CC3_ENABLE_D =
0 x00000100
/* enable data cache (68030) */
CC3_ENABLE_IB =
0 x00000010
/* enable instruction burst (68030) */
CC3_CLR_I =
0 x00000008
/* clear instruction cache (68030) */
CC3_CLRE_I =
0 x00000004
/* clear entry in instruction cache (68030) */
CC3_FREEZE_I =
0 x00000002
/* freeze instruction cache (68030) */
CC3_ENABLE_I =
0 x00000001
/* enable instruction cache (68030) */
/* Miscellaneous definitions */
PAGESIZE =
4096
PAGESHIFT =
12
ROOT_TABLE_SIZE =
128
PTR_TABLE_SIZE =
128
PAGE_TABLE_SIZE =
64
ROOT_INDEX_SHIFT =
25
PTR_INDEX_SHIFT =
18
PAGE_INDEX_SHIFT =
12
#ifdef DEBUG
/* When debugging use readable names for labels */
#ifdef __STDC__
#define L(name) .head.S.##name
#else
#define L(name) .head.S.
/**/name
#endif
#else
#ifdef __STDC__
#define L(name) .L##name
#else
#define L(name) .L
/**/name
#endif
#endif
/* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
#ifndef __INITDATA
#define __INITDATA .
data
#define __FINIT .previous
#endif
/* Several macros to make the writing of subroutines easier: * - func_start marks the beginning of the routine which setups the frame * register and saves the registers , it also defines another macro * to automatically restore the registers again . * - func_return marks the end of the routine and simply calls the prepared * macro to restore registers and jump back to the caller . * - func_define generates another macro to automatically put arguments * onto the stack call the subroutine and cleanup the stack again .
/* Within subroutines these macros can be used to access the arguments * on the stack . With STACK some allocated memory on the stack can be * accessed and ARG0 points to the return address ( used by mmu_engage ) .
#define STACK %a6@(stackstart)
#define ARG0 %a6@(
4 )
#define ARG1 %a6@(
8 )
#define ARG2 %a6@(
12 )
#define ARG3 %a6@(
16 )
#define ARG4 %a6@(
20 )
.macro func_start name,saveregs,stack=
0
L(\name):
linkw %a6,#-\stack
moveml \saveregs,%sp@-
.
set stackstart,-\stack
.macro func_return_\name
moveml %sp@+,\saveregs
unlk %a6
rts
.endm
.endm
.macro func_return name
func_return_\name
.endm
.macro func_call name
jbsr L(\name)
.endm
.macro move_stack nr,arg1,arg2,arg3,arg4
.if \nr
move_stack
"(\nr-1)" ,\arg2,\arg3,\arg4
movel \arg1,%sp@-
.endif
.endm
.macro func_define name,nr=
0
.macro \name arg1,arg2,arg3,arg4
move_stack \nr,\arg1,\arg2,\arg3,\arg4
func_call \name
.if \nr
lea %sp@(\nr*
4 ),%sp
.endif
.endm
.endm
func_define mmu_map,
4
func_define mmu_map_tt,
4
func_define mmu_fixup_page_mmu_cache,
1
func_define mmu_temp_map,
2
func_define mmu_engage
func_define mmu_get_root_table_entry,
1
func_define mmu_get_ptr_table_entry,
2
func_define mmu_get_page_table_entry,
2
func_define mmu_print
func_define get_new_page
#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
func_define set_leds
#endif
.macro mmu_map_eq arg1,arg2,arg3
mmu_map \arg1,\arg1,\arg2,\arg3
.endm
.macro get_bi_record record
pea \record
func_call get_bi_record
addql #
4 ,%sp
.endm
func_define serial_putc,
1
func_define console_putc,
1
func_define console_init
func_define console_put_penguin
func_define console_plot_pixel,
3
func_define console_scroll
.macro putc ch
#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
pea \ch
#endif
#ifdef CONSOLE_DEBUG
func_call console_putc
#endif
#ifdef SERIAL_DEBUG
func_call serial_putc
#endif
#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
addql #
4 ,%sp
#endif
.endm
.macro dputc ch
#ifdef DEBUG
putc \ch
#endif
.endm
func_define putn,
1
.macro dputn nr
#ifdef DEBUG
putn \nr
#endif
.endm
.macro puts string
#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
__INITDATA
.Lstr\@:
.string
"\string"
__FINIT
pea %pc@(.Lstr\@)
func_call puts
addql #
4 ,%sp
#endif
.endm
.macro dputs string
#ifdef DEBUG
puts
"\string"
#endif
.endm
#define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
#define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
#define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
#define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
#define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
#define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
#define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
#define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
#define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
#define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
#define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
#define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
#define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
#define is_not_virt(lab) cmpl &MACH_VIRT,%pc@(m68k_machtype); jne lab
#define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
jeq
42 f; \
cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
jne lab ;\
42 :\
#define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+
3 ); jne lab
#define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+
3 ); jeq lab
#define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+
3 ); jne lab
#define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+
3 ); jne lab
#define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+
3 ); jeq lab
#define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+
3 ); jne lab
#define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+
3 ); jeq lab
/* On the HP300 we use the on-board LEDs for debug output before the console is running . Writing a 1 bit turns the corresponding LED
.macro leds mask
#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
hasnt_leds(.Lled\@)
pea \mask
func_call set_leds
addql #
4 ,%sp
.Lled\@:
#endif
.endm
__HEAD
ENTRY(_stext)
/* * Version numbers of the bootinfo interface * The area from _ stext to _ start will later be used as kernel pointer table
bras
1 f
/* Jump over bootinfo version numbers */
.long BOOTINFOV_MAGIC
.long MACH_AMIGA, AMIGA_BOOTI_VERSION
.long MACH_ATARI, ATARI_BOOTI_VERSION
.long MACH_MVME147, MVME147_BOOTI_VERSION
.long MACH_MVME16x, MVME16x_BOOTI_VERSION
.long MACH_BVME6000, BVME6000_BOOTI_VERSION
.long MACH_MAC, MAC_BOOTI_VERSION
.long MACH_Q40, Q40_BOOTI_VERSION
.long MACH_HP300, HP300_BOOTI_VERSION
.long
0
1 : jra __start
.equ kernel_pg_dir,_stext
.equ .,_stext+PAGESIZE
ENTRY(_start)
jra __start
__INIT
ENTRY(__start)
/* * Setup initial stack pointer
lea %pc@(_stext),%sp
/* * Record the CPU and machine type .
get_bi_record BI_MACHTYPE
lea %pc@(m68k_machtype),%a1
movel %a0@,%a1@
get_bi_record BI_FPUTYPE
lea %pc@(m68k_fputype),%a1
movel %a0@,%a1@
get_bi_record BI_MMUTYPE
lea %pc@(m68k_mmutype),%a1
movel %a0@,%a1@
get_bi_record BI_CPUTYPE
lea %pc@(m68k_cputype),%a1
movel %a0@,%a1@
leds
0 x1
#ifdef CONFIG_MAC
/* * For Macintosh , we need to determine the display parameters early ( at least * while debugging it ) .
is_not_mac(L(test_notmac))
get_bi_record BI_MAC_VADDR
lea %pc@(L(mac_videobase)),%a1
movel %a0@,%a1@
get_bi_record BI_MAC_VDEPTH
lea %pc@(L(mac_videodepth)),%a1
movel %a0@,%a1@
get_bi_record BI_MAC_VDIM
lea %pc@(L(mac_dimensions)),%a1
movel %a0@,%a1@
get_bi_record BI_MAC_VROW
lea %pc@(L(mac_rowbytes)),%a1
movel %a0@,%a1@
get_bi_record BI_MAC_SCCBASE
lea %pc@(L(mac_sccbase)),%a1
movel %a0@,%a1@
L(test_notmac):
#endif
/* CONFIG_MAC */
#ifdef CONFIG_VIRT
is_not_virt(L(test_notvirt))
get_bi_record BI_VIRT_GF_TTY_BASE
lea %pc@(L(virt_gf_tty_base)),%a1
movel %a0@,%a1@
L(test_notvirt):
#endif
/* CONFIG_VIRT */
/* * There are ultimately two pieces of information we want for all kinds of * processors CpuType and CacheBits . The CPUTYPE was passed in from booter * and is converted here from a booter type definition to a separate bit * number which allows for the standard is_0x0 macro tests .
movel %pc@(m68k_cputype),%d0
/* * Assume it ' s an 030
clrl %d1
/* * Test the BootInfo cputype for 060
btst #CPUB_68060,%d0
jeq
1 f
bset #CPUTYPE_060,%d1
bset #CPUTYPE_0460,%d1
jra
3 f
1 :
/* * Test the BootInfo cputype for 040
btst #CPUB_68040,%d0
jeq
2 f
bset #CPUTYPE_040,%d1
bset #CPUTYPE_0460,%d1
jra
3 f
2 :
/* * Test the BootInfo cputype for 020
btst #CPUB_68020,%d0
jeq
3 f
bset #CPUTYPE_020,%d1
jra
3 f
3 :
/* * Record the cpu type
lea %pc@(L(cputype)),%a0
movel %d1,%a0@
/* * NOTE : * * Now the macros are valid : * is_040_or_060 * is_not_040_or_060 * is_040 * is_060 * is_not_060
/* * Determine the cache mode for pages holding MMU tables * and for supervisor mode , unused for ' 020 and ' 030
clrl %d0
clrl %d1
is_not_040_or_060(L(save_cachetype))
/* * ' 040 or ' 060 * d1 : = cacheable write - through * NOTE : The 68040 manual strongly recommends non - cached for MMU tables , * but we have been using write - through since at least 2 . 0 . 29 so I * guess it is OK .
#ifdef CONFIG_060_WRITETHROUGH
/* * If this is a 68060 board using drivers with cache coherency * problems , then supervisor memory accesses need to be write - through * also ; otherwise , we want copyback .
is_not_060(
1 f)
movel #_PAGE_CACHE040W,%d0
jra L(save_cachetype)
#endif
/* CONFIG_060_WRITETHROUGH */
1 :
movew #_PAGE_CACHE040,%d0
movel #_PAGE_CACHE040W,%d1
L(save_cachetype):
/* Save cache mode for supervisor mode and page tables
lea %pc@(m68k_supervisor_cachemode),%a0
movel %d0,%a0@
lea %pc@(m68k_pgtable_cachemode),%a0
movel %d1,%a0@
/* * raise interrupt level
movew #
0 x2700,%sr
/* If running on an Atari , determine the I / O base of the serial port and test if we are running on a Medusa or Hades . This test is necessary here , because on the Hades the serial port is only accessible in the high I / O memory area . The test whether it is a Medusa is done by writing to the byte at phys . 0 x0 . This should result in a bus error on all other machines . . . . should , but doesn ' t . The Afterburner040 for the Falcon has the same behaviour ( 0 x0 . . 0 x7 are no ROM shadow ) . So we have to do another test to distinguish Medusa and AB040 . This is a read attempt for 0 x00ff82fe phys . that should bus error on a Falcon ( + AB040 ) , but is in the range where the Medusa always asserts DTACK . The test for the Hades is done by reading address 0 xb0000000 . This should give a bus error on the Medusa .
#ifdef CONFIG_ATARI
is_not_atari(L(notypetest))
/* get special machine type (Medusa/Hades/AB40) */
moveq #
0 ,%d3
/* default if tag doesn't exist */
get_bi_record BI_ATARI_MCH_TYPE
tstl %d0
jbmi
1 f
movel %a0@,%d3
lea %pc@(atari_mch_type),%a0
movel %d3,%a0@
1 :
/* On the Hades, the iobase must be set up before opening the
moveq #
0 ,%d0
cmpl #ATARI_MACH_HADES,%d3
jbne
1 f
movel #
0 xff000000,%d0
/* Hades I/O base addr: 0xff000000 */
1 : lea %pc@(L(iobase)),%a0
movel %d0,%a0@
L(notypetest):
#endif
#ifdef CONFIG_VME
is_mvme147(L(getvmetype))
is_bvme6000(L(getvmetype))
is_not_mvme16x(L(gvtdone))
/* See if the loader has specified the BI_VME_TYPE tag. Recent * versions of VMELILO and TFTPLILO do this . We have to do this * early so we know how to handle console output . If the tag * doesn ' t exist then we use the Bug for output on MVME16x .
L(getvmetype):
get_bi_record BI_VME_TYPE
tstl %d0
jbmi
1 f
movel %a0@,%d3
lea %pc@(vme_brdtype),%a0
movel %d3,%a0@
1 :
#ifdef CONFIG_MVME16x
is_not_mvme16x(L(gvtdone))
/* Need to get the BRD_ID info to differentiate between 162, 167, * etc . This is available as a BI_VME_BRDINFO tag with later * versions of VMELILO and TFTPLILO , otherwise we call the Bug .
get_bi_record BI_VME_BRDINFO
tstl %d0
jpl
1 f
/* Get pointer to board ID data from Bug */
movel %d2,%sp@-
trap #
15
.
word 0 x70
/* trap 0x70 - .BRD_ID */
movel %sp@+,%a0
1 :
lea %pc@(mvme_bdid),%a1
/* Structure is 32 bytes long */
movel %a0@+,%a1@+
movel %a0@+,%a1@+
movel %a0@+,%a1@+
movel %a0@+,%a1@+
movel %a0@+,%a1@+
movel %a0@+,%a1@+
movel %a0@+,%a1@+
movel %a0@+,%a1@+
#endif
L(gvtdone):
#endif
#ifdef CONFIG_HP300
is_not_hp300(L(nothp))
/* Get the address of the UART for serial debugging */
get_bi_record BI_HP300_UART_ADDR
tstl %d0
jbmi
1 f
movel %a0@,%d3
lea %pc@(L(uartbase)),%a0
movel %d3,%a0@
get_bi_record BI_HP300_UART_SCODE
tstl %d0
jbmi
1 f
movel %a0@,%d3
lea %pc@(L(uart_scode)),%a0
movel %d3,%a0@
1 :
L(nothp):
#endif
/* * Initialize serial port
jbsr L(serial_init)
/* * Initialize console
#ifdef CONFIG_MAC
is_not_mac(L(nocon))
# ifdef CONSOLE_DEBUG
console_init
# ifdef CONFIG_LOGO
console_put_penguin
# endif
/* CONFIG_LOGO */
# endif
/* CONSOLE_DEBUG */
L(nocon):
#endif
/* CONFIG_MAC */
putc
'\n'
putc
'A'
leds
0 x2
dputn %pc@(L(cputype))
dputn %pc@(m68k_supervisor_cachemode)
dputn %pc@(m68k_pgtable_cachemode)
dputc
'\n'
/* * Save physical start address of kernel
lea %pc@(L(phys_kernel_start)),%a0
lea %pc@(_stext),%a1
subl #_stext,%a1
addl #PAGE_OFFSET,%a1
movel %a1,%a0@
putc
'B'
leds
0 x4
/* * mmu_init * * This block of code does what ' s necessary to map in the various kinds * of machines for execution of Linux . * First map the first 4 , 8 , or 16 MB of kernel code & data
get_bi_record BI_MEMCHUNK
movel %a0@(
4 ),%d0
movel #
16 *
1024 *
1024 ,%d1
cmpl %d0,%d1
jls
1 f
lsrl #
1 ,%d1
cmpl %d0,%d1
jls
1 f
lsrl #
1 ,%d1
1 :
lea %pc@(m68k_init_mapped_size),%a0
movel %d1,%a0@
mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\
%pc@(m68k_supervisor_cachemode)
putc
'C'
#ifdef CONFIG_AMIGA
L(mmu_init_amiga):
is_not_amiga(L(mmu_init_not_amiga))
/* * mmu_init_amiga
putc
'D'
is_not_040_or_060(
1 f)
/* * 040 : Map the 16 Meg range physical 0 x0 up to logical 0 x8000 . 0000
mmu_map #
0 x80000000,#
0 ,#
0 x01000000,#_PAGE_NOCACHE_S
/* * Map the Zorro III I / O space with transparent translation * for frame buffer memory etc .
mmu_map_tt #
1 ,#
0 x40000000,#
0 x20000000,#_PAGE_NOCACHE_S
jbra L(mmu_init_done)
1 :
/* * 030 : Map the 32 Meg range physical 0 x0 up to logical 0 x8000 . 0000
mmu_map #
0 x80000000,#
0 ,#
0 x02000000,#_PAGE_NOCACHE030
mmu_map_tt #
1 ,#
0 x40000000,#
0 x20000000,#_PAGE_NOCACHE030
jbra L(mmu_init_done)
L(mmu_init_not_amiga):
#endif
#ifdef CONFIG_ATARI
L(mmu_init_atari):
is_not_atari(L(mmu_init_not_atari))
putc
'E'
/* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping the last 16 MB of virtual address space to the first 16 MB ( i . e . 0 xffxxxxxx - > 0 x00xxxxxx ) . For this , an additional pointer table is needed . I / O ranges are marked non - cachable . For the Medusa it is better to map the I / O region transparently ( i . e . 0 xffxxxxxx - > 0 xffxxxxxx ) , because some I / O registers are accessible only in the high area . On the Hades all I / O registers are only accessible in the high area .
/* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
moveq #
0 ,%d0
movel %pc@(atari_mch_type),%d3
cmpl #ATARI_MACH_MEDUSA,%d3
jbeq
2 f
cmpl #ATARI_MACH_HADES,%d3
jbne
1 f
2 : movel #
0 xff000000,%d0
/* Medusa/Hades base addr: 0xff000000 */
1 : movel %d0,%d3
is_040_or_060(L(spata68040))
/* Map everything non-cacheable, though not all parts really * need to disable caches ( crucial only for 0 xff8000 . . 0 xffffff * ( standard I / O ) and 0 xf00000 . . 0 xf3ffff ( IDE ) ) . The remainder * isn ' t really used , except for sometimes peeking into the * ROMs ( mirror at phys . 0 x0 ) , so caching isn ' t necessary for
mmu_map #
0 xff000000,%d3,#
0 x01000000,#_PAGE_NOCACHE030
jbra L(mmu_init_done)
L(spata68040):
mmu_map #
0 xff000000,%d3,#
0 x01000000,#_PAGE_NOCACHE_S
jbra L(mmu_init_done)
L(mmu_init_not_atari):
#endif
#ifdef CONFIG_Q40
is_not_q40(L(notq40))
/* * add transparent mapping for 0 xff00 0000 - 0 xffff ffff * non - cached serialized etc . . * this includes master chip , DAC , RTC and ISA ports * 0 xfe000000 - 0 xfeffffff is for screen and ROM
putc
'Q'
mmu_map_tt #
0 ,#
0 xfe000000,#
0 x01000000,#_PAGE_CACHE040W
mmu_map_tt #
1 ,#
0 xff000000,#
0 x01000000,#_PAGE_NOCACHE_S
jbra L(mmu_init_done)
L(notq40):
#endif
#ifdef CONFIG_HP300
is_not_hp300(L(nothp300))
/* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx) * by mapping 32 MB ( on 020 / 030 ) or 16 MB ( on 040 ) from 0 xf0xxxxxx - > 0 x00xxxxxx ) . * The ROM mapping is needed because the LEDs are mapped there too .
is_040(
1 f)
/* * 030 : Map the 32 Meg range physical 0 x0 up to logical 0 xf000 . 0000
mmu_map #
0 xf0000000,#
0 ,#
0 x02000000,#_PAGE_NOCACHE030
jbra L(mmu_init_done)
1 :
/* * 040 : Map the 16 Meg range physical 0 x0 up to logical 0 xf000 . 0000
mmu_map #
0 xf0000000,#
0 ,#
0 x01000000,#_PAGE_NOCACHE_S
jbra L(mmu_init_done)
L(nothp300):
#endif
/* CONFIG_HP300 */
#ifdef CONFIG_MVME147
is_not_mvme147(L(not147))
/* * On MVME147 we have already created kernel page tables for * 4 MB of RAM at address 0 , so now need to do a transparent * mapping of the top of memory space . Make it 0 . 5 GByte for now , * so we can access on - board i / o areas .
mmu_map_tt #
1 ,#
0 xe0000000,#
0 x20000000,#_PAGE_NOCACHE030
jbra L(mmu_init_done)
L(not147):
#endif
/* CONFIG_MVME147 */
#ifdef CONFIG_MVME16x
is_not_mvme16x(L(not16x))
/* * On MVME16x we have already created kernel page tables for * 4 MB of RAM at address 0 , so now need to do a transparent * mapping of the top of memory space . Make it 0 . 5 GByte for now . * Supervisor only access , so transparent mapping doesn ' t * clash with User code virtual address space . * this covers IO devices , PROM and SRAM . The PROM and SRAM * mapping is needed to allow 167 Bug to run . * IO is in the range 0 xfff00000 to 0 xfffeffff . * PROM is 0 xff800000 - > 0 xffbfffff and SRAM is * 0 xffe00000 - > 0 xffe1ffff .
mmu_map_tt #
1 ,#
0 xe0000000,#
0 x20000000,#_PAGE_NOCACHE_S
jbra L(mmu_init_done)
L(not16x):
#endif
/* CONFIG_MVME162 | CONFIG_MVME167 */
#ifdef CONFIG_BVME6000
is_not_bvme6000(L(not6000))
/* * On BVME6000 we have already created kernel page tables for * 4 MB of RAM at address 0 , so now need to do a transparent * mapping of the top of memory space . Make it 0 . 5 GByte for now , * so we can access on - board i / o areas . * Supervisor only access , so transparent mapping doesn ' t * clash with User code virtual address space .
mmu_map_tt #
1 ,#
0 xe0000000,#
0 x20000000,#_PAGE_NOCACHE_S
jbra L(mmu_init_done)
L(not6000):
#endif
/* CONFIG_BVME6000 */
/* * mmu_init_mac * * The Macintosh mappings are less clear . * * Even as of this writing , it is unclear how the * Macintosh mappings will be done . However , as * the first author of this code I ' m proposing the * following model : * * Map the kernel ( that ' s already done ) , * Map the I / O ( on most machines that ' s the * 0 x5000 . 0000 . . . 0 x5300 . 0000 range , * Map the video frame buffer using as few pages * as absolutely ( this requirement mostly stems from * the fact that when the frame buffer is at * 0 x0000 . 0000 then we know there is valid RAM just * above the screen that we don ' t want to waste !). * * By the way , if the frame buffer is at 0 x0000 . 0000 * then the Macintosh is known as an RBV based Mac . * * By the way 2 , the code currently maps in a bunch of * regions . But I ' d like to cut that out . ( And move most * of the mappings up into the kernel proper . . . or only * map what ' s necessary . )
#ifdef CONFIG_MAC
L(mmu_init_mac):
is_not_mac(L(mmu_init_not_mac))
putc
'F'
is_not_040_or_060(
1 f)
moveq #_PAGE_NOCACHE_S,%d3
jbra
2 f
1 :
moveq #_PAGE_NOCACHE030,%d3
2 :
/* * Mac Note : screen address of logical 0 xF000 . 0000 - > < screen physical > * we simply map the 4 MB that contains the videomem
movel #VIDEOMEMMASK,%d0
andl %pc@(L(mac_videobase)),%d0
mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
/* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
mmu_map_eq #
0 x40000000,#
0 x02000000,%d3
/* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
mmu_map_eq #
0 x50000000,#
0 x03000000,%d3
/* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
mmu_map_tt #
1 ,#
0 xf8000000,#
0 x08000000,%d3
jbra L(mmu_init_done)
L(mmu_init_not_mac):
#endif
#ifdef CONFIG_SUN3X
is_not_sun3x(L(notsun3x))
/* oh, the pain.. We're gonna want the prom code after * starting the MMU , so we copy the mappings , translating * from 8 k - > 4 k pages as we go .
/* copy maps from 0xfee00000 to 0xff000000 */
movel #
0 xfee00000, %d0
moveq #ROOT_INDEX_SHIFT, %d1
lsrl %d1,%d0
mmu_get_root_table_entry %d0
movel #
0 xfee00000, %d0
moveq #PTR_INDEX_SHIFT, %d1
lsrl %d1,%d0
andl #PTR_TABLE_SIZE-
1 , %d0
mmu_get_ptr_table_entry %a0,%d0
movel #
0 xfee00000, %d0
moveq #PAGE_INDEX_SHIFT, %d1
lsrl %d1,%d0
andl #PAGE_TABLE_SIZE-
1 , %d0
mmu_get_page_table_entry %a0,%d0
/* this is where the prom page table lives */
movel
0 xfefe00d4, %a1
movel %a1@, %a1
movel #((
0 x200000 >>
13 )-
1 ), %d1
1 :
movel %a1@+, %d3
movel %d3,%a0@+
addl #
0 x1000,%d3
movel %d3,%a0@+
dbra %d1,
1 b
/* setup tt1 for I/O */
mmu_map_tt #
1 ,#
0 x40000000,#
0 x40000000,#_PAGE_NOCACHE_S
jbra L(mmu_init_done)
L(notsun3x):
#endif
#ifdef CONFIG_VIRT
is_not_virt(L(novirt))
mmu_map_tt #
1 ,#
0 xFF000000,#
0 x01000000,#_PAGE_NOCACHE_S
jbra L(mmu_init_done)
L(novirt):
#endif
#ifdef CONFIG_APOLLO
is_not_apollo(L(notapollo))
putc
'P'
mmu_map #
0 x80000000,#
0 ,#
0 x02000000,#_PAGE_NOCACHE030
L(notapollo):
jbra L(mmu_init_done)
#endif
L(mmu_init_done):
putc
'G'
leds
0 x8
/* * mmu_fixup * * On the 040 class machines , all pages that are used for the * mmu have to be fixed up . According to Motorola , pages holding mmu * tables should be non - cacheable on a ' 040 and write - through on a * ' 060 . But analysis of the reasons for this , and practical * experience , showed that write - through also works on a ' 040 . * * Allocated memory so far goes from kernel_end to memory_start that * is used for all kind of tables , for that the cache attributes * are now fixed .
L(mmu_fixup):
is_not_040_or_060(L(mmu_fixup_done))
#ifdef MMU_NOCACHE_KERNEL
jbra L(mmu_fixup_done)
#endif
/* first fix the page at the start of the kernel, that * contains also kernel_pg_dir .
movel %pc@(L(phys_kernel_start)),%d0
subl #PAGE_OFFSET,%d0
lea %pc@(_stext),%a0
subl %d0,%a0
mmu_fixup_page_mmu_cache %a0
movel %pc@(L(kernel_end)),%a0
subl %d0,%a0
movel %pc@(L(memory_start)),%a1
subl %d0,%a1
bra
2 f
1 :
mmu_fixup_page_mmu_cache %a0
addw #PAGESIZE,%a0
2 :
cmpl %a0,%a1
jgt
1 b
L(mmu_fixup_done):
#ifdef MMU_PRINT
mmu_print
#endif
/* * mmu_engage * * This chunk of code performs the gruesome task of engaging the MMU . * The reason it ' s gruesome is because when the MMU becomes engaged it * maps logical addresses to physical addresses . The Program Counter * register is then passed through the MMU before the next instruction * is fetched ( the instruction following the engage MMU instruction ) . * This may mean one of two things : * 1 . The Program Counter falls within the logical address space of * the kernel of which there are two sub - possibilities : * A . The PC maps to the correct instruction ( logical PC = = physical * code location ) , or * B . The PC does not map through and the processor will read some * data ( or instruction ) which is not the logically next instr . * As you can imagine , A is good and B is bad . * Alternatively , * 2 . The Program Counter does not map through the MMU . The processor * will take a Bus Error . * Clearly , 2 is bad . * It doesn ' t take a wiz kid to figure you want 1 . A . * This code creates that possibility . * There are two possible 1 . A . states ( we now ignore the other above states ) : * A . The kernel is located at physical memory addressed the same as * the logical memory for the kernel , i . e . , 0 x01000 . * B . The kernel is located some where else . e . g . , 0 x0400 . 0000 * * Under some conditions the Macintosh can look like A or B . * [ A friend and I once noted that Apple hardware engineers should be * wacked twice each day : once when they show up at work ( as in , Whack !, * " This is for the screwy hardware we know you ' re going to design today . " ) , * and also at the end of the day ( as in , Whack ! "I don't know what * you designed today , but I ' m sure it wasn ' t good . " ) . - - rst ] * * This code works on the following premise : * If the kernel start ( % d5 ) is within the first 16 Meg of RAM , * then create a mapping for the kernel at logical 0 x8000 . 0000 to * the physical location of the pc . And , create a transparent * translation register for the first 16 Meg . Then , after the MMU * is engaged , the PC can be moved up into the 0 x8000 . 0000 range * and then the transparent translation can be turned off and then * the PC can jump to the correct logical location and it will be * home ( finally ) . This is essentially the code that the Amiga used * to use . Now , it ' s generalized for all processors . Which means * that a fresh ( but temporary ) mapping has to be created . The mapping * is made in page 0 ( an as of yet unused location - - except for the * stack !). This temporary mapping will only require 1 pointer table * and a single page table ( it can map 256 K ) . * * OK , alternatively , imagine that the Program Counter is not within * the first 16 Meg . Then , just use Transparent Translation registers * to do the right thing . * * Last , if _ start is already at 0 x01000 , then there ' s nothing special * to do ( in other words , in a degenerate case of the first case above , * do nothing ) . * * Let ' s do it . * *
putc
'H'
mmu_engage
/* * After this point no new memory is allocated and * the start of available memory is stored in availmem . * ( The bootmem allocator requires now the physical address . )
movel L(memory_start),availmem
#ifdef CONFIG_AMIGA
is_not_amiga(
1 f)
/* fixup the Amiga custom register location before printing */
clrl L(custom)
1 :
#endif
#ifdef CONFIG_ATARI
is_not_atari(
1 f)
/* fixup the Atari iobase register location before printing */
movel #
0 xff000000,L(iobase)
1 :
#endif
#ifdef CONFIG_MAC
is_not_mac(
1 f)
movel #~VIDEOMEMMASK,%d0
andl L(mac_videobase),%d0
addl #VIDEOMEMBASE,%d0
movel %d0,L(mac_videobase)
#ifdef CONSOLE_DEBUG
movel %pc@(L(phys_kernel_start)),%d0
subl #PAGE_OFFSET,%d0
subl %d0,L(console_font)
subl %d0,L(console_font_data)
#endif
orl #
0 x50000000,L(mac_sccbase)
1 :
#endif
#ifdef CONFIG_HP300
is_not_hp300(
2 f)
/* * Fix up the iobase register to point to the new location of the LEDs .
movel #
0 xf0000000,L(iobase)
/* * Energise the FPU and caches .
is_040(
1 f)
movel #
0 x60,
0 xf05f400c
jbra
2 f
/* * 040 : slightly different , apparently .
1 : movew #
0 ,
0 xf05f400e
movew #
0 x64,
0 xf05f400e
2 :
#endif
#ifdef CONFIG_SUN3X
is_not_sun3x(
1 f)
/* enable copro */
oriw #
0 x4000,
0 x61000000
1 :
#endif
#ifdef CONFIG_APOLLO
is_not_apollo(
1 f)
/* * Fix up the iobase before printing
movel #
0 x80000000,L(iobase)
1 :
#endif
putc
'I'
leds
0 x10
/* * Enable caches
is_not_040_or_060(L(cache_not_680460))
L(cache680460):
.chip
68040
nop
cpusha %bc
nop
is_060(L(cache68060))
movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
/* MMU stuff works in copyback mode now, so enable the cache */
movec %d0,%cacr
jra L(cache_done)
L(cache68060):
movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA
_B,%d0/* MMU stuff works in copyback mode now, so enable the cache */ /* enable superscalar dispatch in PCR */ 1 ,%d068060 68030 %d068 k'J' /* * Setup initial stack pointer 'K' /* clear a6 for gdb */ /* * The new 64 bit printf support requires an early exception initialization . /* jump to the kernel start */ '\n' 0 x55/* * Find a tag record in the bootinfo structure * The bootinfo structure is located right after the kernel * Returns : d0 : size ( - 1 if not found ) * a0 : data pointer ( end - of - records if not found ) 1 : tstw %a0@(BIR_TAG)3 f2 f1 b2 : moveq #0 ,%d04 f3 : moveq #-1 ,%d04 :/* * MMU Initialization Begins Here * * The structure of the MMU tables on the 68 k machines * is thus : * Root Table * Logical addresses are translated through * a hierarchical translation mechanism where the high - order * seven bits of the logical address ( LA ) are used as an * index into the " root table . " Each entry in the root * table has a bit which specifies if it ' s a valid pointer to a * pointer table . Each entry defines a 32 Meg range of memory . * If an entry is invalid then that logical range of 32 M is * invalid and references to that range of memory ( when the MMU * is enabled ) will fault . If the entry is valid , then it does * one of two things . On 040 / 060 class machines , it points to * a pointer table which then describes more finely the memory * within that 32 M range . On 020 / 030 class machines , a technique * called " early terminating descriptors " are used . This technique * allows an entire 32 Meg to be described by a single entry in the * root table . Thus , this entry in the root table , contains the * physical address of the memory or I / O at the logical address * which the entry represents and it also contains the necessary * cache bits for this region . * * Pointer Tables * Per the Root Table , there will be one or more * pointer tables . Each pointer table defines a 32 M range . * Not all of the 32 M range need be defined . Again , the next * seven bits of the logical address are used an index into * the pointer table to point to page tables ( if the pointer * is valid ) . There will undoubtedly be more than one * pointer table for the kernel because each pointer table * defines a range of only 32 M . Valid pointer table entries * point to page tables , or are early terminating entries * themselves . * * Page Tables * Per the Pointer Tables , each page table entry points * to the physical page in memory that supports the logical * address that translates to the particular index . * * In short , the Logical Address gets translated as follows : * bits 31 . . 26 - index into the Root Table * bits 25 . . 18 - index into the Pointer Table * bits 17 . . 12 - index into the Page Table * bits 11 . . 0 - offset into a particular 4 K page * * The algorithms which follow do one thing : they abstract * the MMU hardware . For example , there are three kinds of * cache settings that are relevant . Either , memory is * being mapped in which case it is either Kernel Code ( or * the RamDisk ) or it is MMU data . On the 030 , the MMU data * option also describes the kernel . Or , I / O is being mapped * in which case it has its own kind of cache bits . There * are constants which abstract these notions from the code that * actually makes the call to map some range of memory . * * * /* * mmu_print * * This algorithm will print out the current MMU mappings . * * Input : * % a5 points to the root table . Everything else is calculated * from this . 0 4 8 12 16 1 1 0 1 f; putc z; jbra 2 f; 1 : putc n; 2 :"\nMMU040\n" "rp:" '\n' 0 /* * The following # if / # endif block is a tight algorithm for dumping the 040 * MMU Map in gory detail . It really isn ' t that practical unless the * MMU Map algorithm appears to go awry and you need to debug it at the * entry per entry level . 0 skip the kernel mappings,1 ,%d5 | they (might) work1 : tstl %d51 ,%d51 ,%d71 b2 : putn %d70 xFFFFFE00,%d7' ' 3 : tstl %d411 f1 ,%d41 ,%d73 b4 : putn %d70 xFFFFFF00,%d75 : movel #8 ,%d26 : tstl %d331 f1 ,%d30 ,%d66 b7 : tstl %d28 f1 ,%d2' ' 91 f8 : putc '\n' 8 +1 +8 +1 +1 ,%d29 : putc ' ' 9 b7 ,%d291 : putn %d66 b31 : putc '\n' 8 +1 ,%d232 : putc ' ' 32 b3 b11 : putc '\n' 1 b/* MMU 040 Dumping code that's gory and detailed */ /* a0 has the address of the root table ptr */ 0 x00000000,%a4 /* logical address */ 0 ,%d040 :/* Increment the logical address and preserve in d5 */ 13 ,%d51 ,%d641 f48 f41 :0 ,%d10 xfffffe00,%d642 :6 ,%d51 ,%d643 f47 f43 :0 ,%d20 xffffff00,%d644 :0 ,%d645 f46 f45 :0 xfffff4e0,%d146 :1 ,%d264 ,%d244 b47 :1 ,%d1128 ,%d142 b48 :/* move to the next logical address */ 1 ,%d0128 ,%d040 b68040 0 x8000,%d1 /* is it valid ? */ 1 f /* No, bail out */ 0 xff000000,%d1 /* Get the address */ "==" 1 :0 x8000,%d1 /* is it valid ? */ 1 f /* No, bail out */ 0 xff000000,%d1 /* Get the address */ "==" 1 :68 k10 ,%d6' ' ,'G' ) /* global bit */ 7 ,%d6' ' ,'S' ) /* supervisor bit */ 6 ,%d63 f'C' 5 ,%d6'w' ,'c' ) /* write through or copy-back */ 4 f3 :'N' 5 ,%d6's' ,' ' ) /* serialized non-cacheable, or non-cacheable */ 4 :6 ,%d6'C' ,'I' ) /* write through or copy-back */ "\nMMU030\n" "\nrp:" '\n' 0 xfffffff0,%d00 x00000000,%a4 /* logical address */ 0 ,%d030 :13 ,%d51 ,%d6 /* is it a table ptr? */ 31 f /* yes */ 0 ,%d6 /* is it early terminating? */ 1 f /* no */ 38 f1 :38 f31 :0 ,%d10 xfffffff0,%d632 :6 ,%d51 ,%d6 /* is it a table ptr? */ 33 f /* yes */ 0 ,%d6 /* is it a page descriptor? */ 1 f /* no */ 37 f1 :37 f33 :0 ,%d20 xfffffff0,%d634 :0 ,%d635 f36 f35 :36 :1 ,%d264 ,%d234 b37 :1 ,%d1128 ,%d132 b38 :/* move to the next logical address */ 1 ,%d0128 ,%d030 b"\n" "##\n" "->" "machine: " 1 f)"amiga" 9 f1 :2 f)"atari" 9 f2 :3 f)"macintosh" 9 f3 : puts "unknown" 9 : putc '\n' "cputype: 0" 1 f)'6' 9 f1 :2 f)'4' 9 f2 : putc '3' 9 : putc '0' '\n' /* MMU_PRINT */ /* * mmu_map_tt * * This is a specific function which works on all 680 x0 machines . * On 030 , 040 & 060 it will attempt to use Transparent Translation * registers ( tt1 ) . * On 020 it will call the standard mmu_map which will use early * terminating descriptors . 4 "mmu_map_tt:" '\n' /* Extract the highest bit set 0 ,#32 },%d18 ,%d1/* And get the mask 1 ,%d01 ,%d0/* Mask the address /* Generate the upper 16bit of the tt register 8 ,%d0/* set 030 specific bits (read/write access for supervisor mode * ( highest function code set , lower two bits masked ) ) 6 ,%d01 f1 : lea STACK,%a068030 1 f2 f1 : pmove %a0@,%tt12 : .chip 68 k/* set 040 specific bits 68040 1 f2 f1 : movec %d1,%itt12 : .chip 68 k/* * mmu_map * * This routine will map a range of memory using a pointer * table and allocate the pages on the fly from the kernel . * The pointer table does not have to be already linked into * the root table , this routine will do that if necessary . * * NOTE * This routine will assert failure and use the serial_putc * routines in the case of a run - time error . For example , * if the address is already mapped . * * NOTE - 2 * This routine will use early terminating descriptors * where possible for the 68020 + 68851 and 68030 type * processors . "\nmmu_map:" '\n' /* Get logical address and round it down to 256KB /* Get the end address 1 ,%a4/* Get physical address and round it down to 256KB /* Add page attributes to the physical address /* * MMU 040 & 060 Support * * The MMU usage for the 040 and 060 is different enough from * the 030 and 68851 that there is separate code . This comment * block describes the data structures and algorithms built by * this code . * * The 040 does not support early terminating descriptors , as * the 030 does . Therefore , a third level of table is needed * for the 040 , and that would be the page table . In Linux , * page tables are allocated directly from the memory above the * kernel . * /* Calculate the offset into the root table /* Calculate the offset into the pointer table 1 ,%d0/* Calculate the offset into the page table 1 ,%d0/* The page table entry must not no be busy /* Do the mapping and advance the pointers 2 :/* Ready with mapping? 1 ),%a0/* Calculate the offset into the root table /* Check if logical address 32MB aligned, * so we can try to map it once 1 )&(-ROOT_TABLE_SIZE),%d01 f/* Is there enough to map for 32MB at once 1 ),%a11 f1 ,%a1/* The root table entry must not no be busy /* Do the mapping and advance the pointers "early term1" '\n' 1 :/* Calculate the offset into the pointer table 1 ,%d0/* The pointer table entry must not no be busy /* Do the mapping and advance the pointers "early term2" '\n' /* Ready with mapping? 1 ),%a0"mmu_map error:" '\n' /* * mmu_fixup * * On the 040 class machines , all pages that are used for the * mmu have to be fixed up . "mmu_fixup_page_mmu_cache" /* Calculate the offset into the root table /* Calculate the offset into the pointer table 1 ,%d0/* Calculate the offset into the page table 1 ,%d0'\n' /* * mmu_temp_map * * create a temporary mapping to enable the mmu , * this we don ' t need any transparation translation tricks . "mmu_temp_map" '\n' /* Calculate the offset in the root table /* Check if the table is temporary allocated, so we have to reuse it 1 f/* Temporary allocate a ptr table and insert it into the root table 4 ,%a1@" (new)" 1 :/* Mask the root table entry for the ptr table /* Calculate the offset into the pointer table 1 ,%d04 ),%a0/* Check if a temporary page table is already allocated 1 f/* Temporary allocate a page table and insert it into the ptr table /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the 512 ,%a1@" (new)" 1 :/* Mask the ptr table entry for the page table /* Calculate the offset into the page table 1 ,%d04 ),%a0/* Insert the address into the page table '\n' 1 ,%d0/* Temporarily use a different root table. */ 1 :1 b1 ,%d01 :1 b1 b),%a01 b,%a1/* Skip temp mappings if phys == virt */ 1 f1 :68040 /* enable the MMU */ 1 f:l1 : nop68 k12 68030 0 x80000002,%a0@4 )0 x0808,%d0/* * enable , super root enable , 4096 byte pages , 7 bit root index , * 7 bit pointer index , 6 bit page table index . 0 x82c07760,%a0@(8 )8 ),%tc /* enable the MMU */ 1 f:l1 : movel %a2,%a0@(4 )0 x0808,%d068 k0 "mmu_get_root_table_entry:" " =" 2 f"\nmmu_init:" /* Find the start of free memory, get_bi_record does this for us, * as the bootinfo structure is located directly behind the kernel * we simply search for the last entry . 1 ,%a0/* we have to return the first page at _stext since the init code * in mm / init . c simply expects kernel_pg_dir there , the rest of * page is used for further ptr tables in get_ptr_table . 4 ,%a1@1 ,%a1@/* clear the page 4 -1 ,%d01 :1 b'\n' 2 :4 ),%a00 '\n' 0 "mmu_get_ptr_table_entry:" " =" 2 f/* Keep track of the number of pointer tables we use "\nmmu_get_new_ptr_table:" 1 ,%a0@/* See if there is a free pointer table in our cache of pointer tables 7 ,%d01 f/* Get a new pointer table page from above the kernel memory 1 :/* There is an unused pointer table in our cache... use it 4 ,%a1@'\n' /* Insert the new pointer table into the root table 2 :/* Extract the pointer table entry 4 ),%a00 '\n' 0 "mmu_get_page_table_entry:" " =" 2 f/* If the page table entry doesn't exist, we allocate a complete new * page and use it as one continuous big page table which can cover * 4 MB of memory , nearly almost all mappings have that alignment . /* align pointer table entry for a page of page tables /* Insert the page tables into the pointer entries 4 -1 ,%d01 :4 ),%a01 b/* Now we can get the initialized pointer table entry 2 :/* Extract the page table entry 4 ),%a00 '\n' /* * get_new_page * * Return a new page from the memory start and clear it . "\nget_new_page:" /* allocate the page and adjust memory_start /* clear the new page 4 -1 ,%d01 :1 b'\n' /* * Debug output support * Atarians have a choice between the parallel port , the serial port * from the MFP or a serial port of the SCC /* You may define either or both of these. */ /* Modem port */ /* Printer port */ /* Initialisation table for SCC with 3.6864 MHz PCLK */ 4 ,0 x44 /* x16, 1 stopbit, no parity */ 3 ,0 xc0 /* receiver: 8 bpc */ 5 ,0 xe2 /* transmitter: 8 bpc, assert dtr/rts */ 10 ,0 /* NRZ */ 11 ,0 x50 /* use baud rate generator */ 12 ,1 ,13 ,0 /* 38400 baud */ 14 ,1 /* Baud rate generator enable */ 3 ,0 xc1 /* enable receiver */ 5 ,0 xea /* enable transmitter */ 1 /* CONFIG_MAC */ /* #define USE_PRINTER */ /* #define USE_SCC_B */ /* #define USE_SCC_A */ /* Initialisation table for SCC with 7.9872 MHz PCLK */ /* PCLK == 8.0539 gives baud == 9680.1 */ 4 ,0 x44 /* x16, 1 stopbit, no parity */ 3 ,0 xc0 /* receiver: 8 bpc */ 5 ,0 xe2 /* transmitter: 8 bpc, assert dtr/rts */ 10 ,0 /* NRZ */ 11 ,0 x50 /* use baud rate generator */ 12 ,24 ,13 ,0 /* 9600 baud */ 14 ,2 ,14 ,3 /* use master clock for BRG, enable */ 3 ,0 xc1 /* enable receiver */ 5 ,0 xea /* enable transmitter */ 1 0 xff88000 xff88000 xff880214 15 7 0 xfffa010 xfffa050 xfffa090 xff8c850 xff8c870 xff8c810 xff8c830 xfffa290 xfffa1d0 xfffa250 xfffa2d0 xfffa2f/* CONFIG_ATARI */ /* * Serial port output support . /* * Initialize serial port hardware /* * Some of the register usage that follows * CONFIG_AMIGA * a0 = pointer to boot info record * d0 = boot info offset * CONFIG_ATARI * a0 = address of SCC * a1 = Liobase address / address of scc_initable_atari * d0 = init data for serial port * CONFIG_MAC * a0 = address of SCC * a1 = address of scc_initable_mac * d0 = init data for serial port 7 1 f)61 ,CUSTOMBASE+C_SERPER-ZTWOBASE1 :4 f)0 ,%a1@(LSTMFP_IERB)0 ,%a1@(LSTMFP_DDR)0 xff,%a1@(LPSG_WRITE)5 ,%d0/* Reset SCC register pointer */ /* Reset SCC device: write register pointer then register value */ 9 ,%a0@0 xc0,%a0@/* Wait for 5 PCLK cycles, which is about 63 CPU cycles */ /* 5 / 7.9872 MHz = approx. 0.63 us = 63 / 100 MHz */ 32 ,%d02 :1 ,%d02 b/* Initialize channel */ 2 : moveb %a1@+,%d03 f2 b3 : clrb %a0@1 ,%a1@(LMFP_TSR)0 x88,%a1@(LMFP_UCR)0 x70,%a1@(LMFP_TDCDR)2 ,%a1@(LMFP_TDDR)1 ,%a1@(LMFP_TDCDR)1 ,%a1@(LMFP_TSR)4 :0 x00 x20 x40 x6/* Reset SCC register pointer */ /* Reset SCC device: write register pointer then register value */ 9 ,%a0@(mac_scc_cha_a_ctrl_offset)0 xc0,%a0@(mac_scc_cha_a_ctrl_offset)/* Wait for 5 PCLK cycles, which is about 68 CPU cycles */ /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */ 35 ,%d05 :1 ,%d05 b/* Initialize channel A */ 5 : moveb %a1@+,%d06 f5 b6 :/* MAC_USE_SCC_A */ /* Initialize channel B */ 7 : moveb %a1@+,%d08 f7 b8 :/* MAC_USE_SCC_B */ /* CONFIG_MAC */ 2 f)/* debug output goes into SRAM, so we don't do it unless requested 0 xff020010,%a1@ /* must be inited - also used by debug=mem */ 0 xff020000,%a1'%' ,%a1@2 f /*nodbg*/ 4 ,%a1'L' ,%a1@2 f /*nodbg*/ 4 ,%a1'X' ,%a1@2 f /*nodbg*/ 4 ,%a1'$' ,%a1@2 f /*nodbg*/ /* signature OK */ /*nodbg: q40_do_debug is 0 by default*/ 2 :0 x10,M167_PCSCCMICR0 x10,M167_PCSCCTICR0 x10,M167_PCSCCRICR/* We count on the PROM initializing SIO1 */ /* We count on the boot loader initialising the UART */ /* * Output character on serial port . '\n' ,%d01 f/* A little safe recursion is good for the soul */ '\r' 1 :2 f)0 x00ff,%d00 x0100,%d01 : movew %a0@(CUSTOMBASE+C_SERDATR),%d00 x2000,%d01 b2 :5 f)3 : btst #2 ,%a1@(mac_scc_cha_a_ctrl_offset)3 b/* MAC_USE_SCC_A */ 4 : btst #2 ,%a1@(mac_scc_cha_b_ctrl_offset)4 b/* MAC_USE_SCC_B */ 5 :/* CONFIG_MAC */ 4 f)3 : btst #0 ,%a1@(LSTMFP_GPIP)3 b5 ,%d05 ,%d03 : btst #2 ,%a1@(LSCC_CTRL)3 b3 : btst #7 ,%a1@(LMFP_TSR)3 b4 :/* CONFIG_ATARI */ 2 f)1 : btst #2 ,M147_SCC_CTRL_A1 b2 :2 f)/* * If the loader gave us a board type then we can use that to * select an appropriate output routine ; otherwise we just use * the Bug code . If we have to use the Bug that means the Bug * workspace has to be valid , which means the Bug has to use * the SRAM , which is non - standard . 1 f | No tag - use the Bug6 f5 f/* 162/172; it's an SCC */ 6 : btst #2 ,M162_SCC_CTRL_A6 b8 ,M162_SCC_CTRL_A3 f5 :/* 166/167/177; it's a CD2401 */ 0 ,M167_CYCAR0 x02,M167_CYIER7 :5 ,M167_PCSCCTICR7 b8 f0 x08,M167_CYTEOIR7 b8 :0 ,M167_CYTEOIR3 f1 :15 word 0 x0020 /* TRAP 0x020 */ 3 :2 :/* CONFIG_MVME16x */ 2 f)/* * The BVME6000 machine has a serial port . . . 1 : btst #2 ,BVME_SCC_CTRL_A1 b2 :2 f)0 xFEFE0018,%a14 ,%sp2 :2 f)/* only debug if requested */ 2 f4 ,%a02 :2 f)1 : moveb %a1@(LSRB0),%d00 x4,%d01 b2 :3 f)/* Check the scode */ 3 f /* Unset? Exit */ 256 ,%d1 /* APCI scode? */ 2 f1 : moveb %a1@(DCALSR),%d1 /* Output to DCA */ 0 x20,%d11 b2 : moveb %a1@(APCILSR),%d1 /* Output to APCI */ 0 x20,%d12 b3 :1 f)1 :/* * Output a string . 2 f1 :2 : moveb %a0@+,%d01 b/* * Output number in hex notation . ' ' 7 ,%d11 : roll #4 ,%d00 x0f,%d2'0' ,%d2'9' ,%d22 f'A' -('9' +1 ),%d22 :1 b/* * This routine takes its parameters on the stack . It then * turns around and calls the internal routines . This routine * is used by the boot console . * * The function signature is - * void debug_cons_nputs ( struct console * c , const char * s , unsigned int n ) * * This routine does NOT understand variable arguments only * simple strings ! 0 x0700,%sr22 ),%a0 /* char *s */ 26 ),%d1 /* unsigned int n */ 2 f1 :1 ,%d12 : jeq 3 f1 b3 :/* CONFIG_EARLY_PRINTK */ 1 f)0 x1ffff)2 f1 :8 ,%d00 xff00,%d02 :/* * For continuity , see the data alignment * to which this structure is tied . 0 4 8 12 16 /* * Some of the register usage that follows * a0 = pointer to boot_info * a1 = pointer to screen * a2 = pointer to console_globals * d3 = pixel width of screen * d4 = pixel height of screen * ( d3 , d4 ) ~ = ( x , y ) of a point just below * and to the right of the screen * NOT on the screen ! * d5 = number of bytes per scan line * d6 = number of bytes on the entire screen /* -> low byte */ /* -> high byte */ 0 xffff,%d3 /* d3 = screen width in pixels */ 0 xffff,%d4 /* d4 = screen height in pixels */ 20 ,%d6/* scan line bytes x num scan lines */ 8 ,%d6 /* we'll clear 8 bytes at a time */ 1 ,%d0 /* Mac_black */ 1 ,%d6/* Calculate font size */ /* default */ /* no compiled-in font */ 0 ,%a0/* * At this point we make a shift in register usage * a1 = address of console_font pointer /* store pointer to struct fbcon_font_desc in console_font */ 1 f/* * Calculate global maxs * Note - we can use either an * 8 x 16 or 8 x 8 character font * 6 x 11 also supported /* ASSERT: a0 = contents of Lconsole_font */ /* screen width in pixels */ /* d0 = max num chars per row */ /* screen height in pixels */ /* d1 = max num rows */ 1 ,%d1 /* row range is 0 to num - 1 */ /* * Clear the current row and column /* * Initialization is complete 1 :/* * Get ' that_penguin ' onto the screen in the upper right corner * penguin is 64 x 74 pixels , align against right edge of screen 0 xffff,%d064 ,%d0 /* snug up against the right edge */ /* start at the top */ 73 ,%d731 ,%d64 ,%d21 ,%d01 ,%d064 ,%d01 ,%d1/* include penguin bitmap */ "../mac/mac_penguin.S" /* * Calculate source and destination addresses * output a1 = dest * a2 = source 1 f/* account for # scan lines per character */ /* * Get dimensions 0 xffff,%d3 /* d3 = screen width in pixels */ 0 xffff,%d4 /* d4 = screen height in pixels */ /* * Calculate number of bytes to move /* we're not scrolling the top row! */ /* scan line bytes x num scan lines */ 32 ,%d6 /* we'll move 8 longs at a time */ 1 ,%d6/* scan line bytes x font height */ 32 ,%d6 /* we'll move 8 words at a time */ 1 ,%d61 ,%d01 :/* Output character in d7 on console. '\n' ,%d7/* implicit \r */ 1 f1 :1 ,%d0'\r' ,%d7/* * At this point we know that the % d7 character is going to be * rendered on the screen . Register usage is - * a0 = pointer to console globals * a1 = font data * d0 = cursor column * d1 = cursor row to draw the character * d7 = character number /* * At this point we make a shift in register usage * a0 = address of pointer to font data ( fbcon_font_desc ) /* Load fbcon_font_desc.data into a1 */ 0 x000000ff,%d7/* ASSERT: a0 = contents of Lconsole_font */ /* d7 = index into font data */ /* a1 = points to char image */ /* * At this point we make a shift in register usage * d0 = pixel coordinate , x * d1 = pixel coordinate , y * d2 = ( bit 0 ) 1 / 0 for white / black ( !) pixel on screen * d3 = font scan line data ( 8 pixels ) * d6 = count down for the font ' s pixel width ( 8 ) * d7 = count down for the font ' s pixel count in height /* ASSERT: a0 = contents of Lconsole_font */ /* Load fbcon_font_desc.height into d7 */ 1 ,%d7/* ASSERT: a0 = contents of Lconsole_font */ /* Load fbcon_font_desc.width into d6 */ 1 ,%d61 ,%d3/* convert 1 bit into a byte */ 1 ,%d0/* ASSERT: a0 = contents of Lconsole_font */ 1 ,%d1/* * Register usage in the code below : * a0 = pointer to console globals * d0 = cursor column * d1 = cursor column limit 1 ,%d0/* Update cursor pos */ '\n' /* Line wrap using tail recursion */ /* * Input : * d0 = x coordinate * d1 = y coordinate * d2 = ( bit 0 ) 1 / 0 for white / black ( !) * All registers are preserved /* * Register usage : * d0 = x coord becomes byte offset into frame buffer * d1 = y coord * d2 = black or white ( 0 / 1 ) * d3 = video depth * d4 = temp of x ( d0 ) for many bit depths 1 ,%d3/* we need the low order 3 bits! */ 8 ,%d07 ,%d47 ,%d4 /* reverse the x-coordinate w/ screen-bit # */ 1 ,%d22 ,%d3/* we need the low order 2 bits! */ 4 ,%d03 ,%d43 ,%d4 /* reverse the x-coordinate w/ screen-bit # */ 1 ,%d4 /* ! */ 1 ,%d21 ,%d41 ,%d44 ,%d3/* we need the low order bit! */ 2 ,%d01 ,%d41 ,%d42 ,%d4 /* ! */ 1 ,%d21 ,%d41 ,%d41 ,%d41 ,%d41 ,%d41 ,%d48 ,%d31 ,%d20 xff,%a1@16 ,%d31 ,%d20 x0fff,%a1@/* CONSOLE_DEBUG */ align 4 0 0 0 /* cursor column */ 0 /* cursor row */ 0 /* max num columns */ 0 /* max num rows */ 0 /* left edge */ 0 /* pointer to console font (struct font_desc) */ 0 /* pointer to console font data */ /* CONSOLE_DEBUG */ 0 /* valid flag */ 0 /* start logical */ 0 /* next logical */ 0 /* start physical */ 0 /* next physical */ /* MMU_PRINT */ 0 0 0 0 0 0 0 0 0 xfffe30020 xfffe30030 xfff450050 xfff450ee0 xfff450110 xfff450260 xfff450850 xfff450f80 xfff4201d0 xfff4201e0 xfff4201f0 xfff420250 xffb0000b0 xffb0000f0 0 0 0 0 /* CONFIG_MAC */ 0 x104120 x104160 x101000 x110 x1b0 x000 x140 1 data align 4 0 0 0 0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 0 0 0 x000 /* CONFIG_VIRT */ Messung V0.5 in Prozent C=90 H=89 G=89
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