Spracherkennung für: .dts vermutete Sprache: Unknown {[0] [0] [0]} [Methode: Schwerpunktbildung, einfache Gewichte, sechs Dimensionen]
// SPDX-License-Identifier: GPL-
2.
0-only OR MIT
/*
* Copyright (C)
2021-
2024 PHYTEC America, LLC -
https://www.phytec.com
* Author: Matt McKee <mmckee@phytec.com>
*
* Copyright (C)
2022-
2024 PHYTEC Messtechnik GmbH
* Author: Wadim Egorov <w.egorov@phytec.de>
*
* Product homepage:
*
https://www.phytec.com/product/phyboard-am64x
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/leds/leds-pca9532.h>
#include <dt-bindings/phy/phy.h>
#include "k3-am642.dtsi"
#include "k3-am64-phycore-som.dtsi"
#include "k3-serdes.h"
/ {
compatible = "phytec,am642-phyboard-electra-rdk",
"phytec,am64-phycore-som", "ti,am642";
model = "PHYTEC phyBOARD-Electra-AM64x RDK";
aliases {
ethernet1 = &icssg0_emac0;
ethernet2 = &icssg0_emac1;
mmc1 = &sdhci1;
serial2 = &main_uart0;
serial3 = &main_uart1;
};
chosen {
stdout-path = &main_uart0;
};
can_tc1: can-phy0 {
compatible = "ti,tcan1042";
pinctrl-names = "default";
pinctrl-
0 = <&can_tc1_pins_default>;
#phy-cells = <
0>;
max-bitrate = <
8000000>;
standby-gpios = <&main_gpio0
32 GPIO_ACTIVE_HIGH>;
};
can_tc2: can-phy1 {
compatible = "ti,tcan1042";
pinctrl-names = "default";
pinctrl-
0 = <&can_tc2_pins_default>;
#phy-cells = <
0>;
max-bitrate = <
8000000>;
standby-gpios = <&main_gpio0
35 GPIO_ACTIVE_HIGH>;
};
/* Dual Ethernet application node on PRU-ICSSG0 */
ethernet {
compatible = "ti,am642-icssg-prueth";
pinctrl-names = "default";
pinctrl-
0 = <&icssg0_rgmii1_pins_default>, <&icssg0_rgmii2_pins_default>;
interrupt-parent = <&icssg0_intc>;
interrupts = <
24 0 2>, <
25 1 3>;
interrupt-names = "tx_ts0", "tx_ts1";
sram = <&oc_sram>;
firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
dmas = <&main_pktdma
0xc100
15>, /* egress slice
0 */
<&main_pktdma
0xc101
15>, /* egress slice
0 */
<&main_pktdma
0xc102
15>, /* egress slice
0 */
<&main_pktdma
0xc103
15>, /* egress slice
0 */
<&main_pktdma
0xc104
15>, /* egress slice
1 */
<&main_pktdma
0xc105
15>, /* egress slice
1 */
<&main_pktdma
0xc106
15>, /* egress slice
1 */
<&main_pktdma
0xc107
15>, /* egress slice
1 */
<&main_pktdma
0x4100
15>, /* ingress slice
0 */
<&main_pktdma
0x4101
15>; /* ingress slice
1 */
dma-names = "tx0-
0", "tx0-
1", "tx0-
2", "tx0-
3",
"tx1-
0", "tx1-
1", "tx1-
2", "tx1-
3",
"rx0", "rx1";
ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
ti,pruss-gp-mux-sel = <
2>, /* MII mode */
<
2>,
<
2>,
<
2>, /* MII mode */
<
2>,
<
2>;
ti,mii-g-rt = <&icssg0_mii_g_rt>;
ti,mii-rt = <&icssg0_mii_rt>;
ti,iep = <&icssg0_iep0>, <&icssg0_iep1>;
ethernet-ports {
#address-cells = <
1>;
#size-cells = <
0>;
icssg0_emac0: port@
0 {
reg = <
0>;
phy-handle = <&icssg0_phy1>;
phy-mode = "rgmii-id";
/* Filled in by bootloader */
local-mac-address = [
00 00 00 00 00 00];
ti,syscon-rgmii-delay = <&main_conf
0x4100>;
};
icssg0_emac1: port@
1 {
reg = <
1>;
phy-handle = <&icssg0_phy2>;
phy-mode = "rgmii-id";
/* Filled in by bootloader */
local-mac-address = [
00 00 00 00 00 00];
ti,syscon-rgmii-delay = <&main_conf
0x4104>;
};
};
};
keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-
0 = <&gpio_keys_pins_default>;
key-home {
label = "home";
linux,code = <KEY_HOME>;
gpios = <&main_gpio0
17 GPIO_ACTIVE_HIGH>;
};
key-menu {
label = "menu";
linux,code = <KEY_MENU>;
gpios = <&main_gpio0
21 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-
0 = <&leds_pins_default>, <&user_leds_pins_default>;
led-
1 {
color = <LED_COLOR_ID_RED>;
gpios = <&main_gpio0
15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
function = LED_FUNCTION_DISK;
};
led-
2 {
color = <LED_COLOR_ID_GREEN>;
gpios = <&main_gpio0
16 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
function = LED_FUNCTION_DISK;
};
};
vcc_3v3_mmc: regulator-sd {
/* TPS22963C */
compatible = "regulator-fixed";
regulator-name = "VCC_3V3_MMC";
regulator-min-microvolt = <
3300000>;
regulator-max-microvolt = <
3300000>;
regulator-boot-on;
regulator-always-on;
bootph-all;
};
};
&main_pmx0 {
can_tc1_pins_default: can-tc1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0084, PIN_OUTPUT,
7) /* (P16) GPMC0_ADVn_ALE.GPIO0_32 */
>;
};
can_tc2_pins_default: can-tc2-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0090, PIN_OUTPUT,
7) /* (P17) GPMC0_BE0n_CLE.GPIO0_35 */
>;
};
clkout0_pins_default: clkout0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0274, PIN_OUTPUT,
5) /* (A19) EXT_REFCLK1.CLKOUT0 */
>;
};
gpio_keys_pins_default: gpio-keys-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0044, PIN_INPUT,
7) /* (T18) GPMC0_AD2.GPIO0_17 */
AM64X_IOPAD(
0x0054, PIN_INPUT,
7) /* (V20) GPMC0_AD6.GPIO0_21 */
>;
};
icssg0_mdio_pins_default: icssg0-mdio-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0200, PIN_INPUT,
0) /* (P2) PRG0_MDIO0_MDIO */
AM64X_IOPAD(
0x0204, PIN_OUTPUT,
0) /* (P3) PRG0_MDIO0_MDC */
AM64X_IOPAD(
0x01A8, PIN_OUTPUT,
7) /* (V1) PRG0_PRU0_GPO18.GPIO1_18 */
AM64X_IOPAD(
0x01AC, PIN_OUTPUT,
7) /* (W1) PRG0_PRU0_GPO19.GPIO1_19 */
>;
};
icssg0_rgmii1_pins_default: icssg0-rgmii1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0160, PIN_INPUT,
2) /* (Y1) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
AM64X_IOPAD(
0x0164, PIN_INPUT,
2) /* (R4) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
AM64X_IOPAD(
0x0168, PIN_INPUT,
2) /* (U2) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
AM64X_IOPAD(
0x016c, PIN_INPUT,
2) /* (V2) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
AM64X_IOPAD(
0x0170, PIN_INPUT,
2) /* (AA2) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */
AM64X_IOPAD(
0x0178, PIN_INPUT,
2) /* (T3) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
AM64X_IOPAD(
0x018c, PIN_OUTPUT,
2) /* (Y3) PRG0_PRU0_GPO11.PRG0_RGMII1_TD0 */
AM64X_IOPAD(
0x0190, PIN_OUTPUT,
2) /* (AA3) PRG0_PRU0_GPO12.PRG0_RGMII1_TD1 */
AM64X_IOPAD(
0x0194, PIN_OUTPUT,
2) /* (R6) PRG0_PRU0_GPO13.PRG0_RGMII1_TD2 */
AM64X_IOPAD(
0x0198, PIN_OUTPUT,
2) /* (V4) PRG0_PRU0_GPO14.PRG0_RGMII1_TD3 */
AM64X_IOPAD(
0x019c, PIN_OUTPUT,
2) /* (T5) PRG0_PRU0_GPO15.PRG0_RGMII1_TX_CTL */
AM64X_IOPAD(
0x01a0, PIN_OUTPUT,
2) /* (U4) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
>;
};
icssg0_rgmii2_pins_default: icssg0-rgmii2-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x01b0, PIN_INPUT,
2) /* (Y2) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
AM64X_IOPAD(
0x01b4, PIN_INPUT,
2) /* (W2) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
AM64X_IOPAD(
0x01b8, PIN_INPUT,
2) /* (V3) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
AM64X_IOPAD(
0x01bc, PIN_INPUT,
2) /* (T4) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
AM64X_IOPAD(
0x01c0, PIN_INPUT,
2) /* (W3) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */
AM64X_IOPAD(
0x01c8, PIN_INPUT,
2) /* (R5) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
AM64X_IOPAD(
0x01dc, PIN_OUTPUT,
2) /* (W4) PRG0_PRU1_GPO11.PRG0_RGMII2_TD0 */
AM64X_IOPAD(
0x01e0, PIN_OUTPUT,
2) /* (Y4) PRG0_PRU1_GPO12.PRG0_RGMII2_TD1 */
AM64X_IOPAD(
0x01e4, PIN_OUTPUT,
2) /* (T6) PRG0_PRU1_GPO13.PRG0_RGMII2_TD2 */
AM64X_IOPAD(
0x01e8, PIN_OUTPUT,
2) /* (U6) PRG0_PRU1_GPO14.PRG0_RGMII2_TD3 */
AM64X_IOPAD(
0x01ec, PIN_OUTPUT,
2) /* (U5) PRG0_PRU1_GPO15.PRG0_RGMII2_TX_CTL */
AM64X_IOPAD(
0x01f0, PIN_OUTPUT,
2) /* (AA4) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
>;
};
main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0268, PIN_INPUT,
0) /* (C18) I2C1_SCL */
AM64X_IOPAD(
0x026c, PIN_INPUT,
0) /* (B19) I2C1_SDA */
>;
};
main_mcan0_pins_default: main-mcan0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0250, PIN_OUTPUT,
0) /* (A17) MCAN0_TX */
AM64X_IOPAD(
0x0254, PIN_INPUT,
0) /* (B17) MCAN0_RX */
>;
};
main_mcan1_pins_default: main-mcan1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0258, PIN_OUTPUT,
0) /* (C17) MCAN1_TX */
AM64X_IOPAD(
0x025c, PIN_INPUT,
0) /* (D17) MCAN1_RX */
>;
};
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x027c, PIN_INPUT_PULLUP,
0) /* (K18) MMC1_DAT3 */
AM64X_IOPAD(
0x0280, PIN_INPUT_PULLUP,
0) /* (K19) MMC1_DAT2 */
AM64X_IOPAD(
0x0284, PIN_INPUT_PULLUP,
0) /* (L21) MMC1_DAT1 */
AM64X_IOPAD(
0x0288, PIN_INPUT_PULLUP,
0) /* (K21) MMC1_DAT0 */
AM64X_IOPAD(
0x028c, PIN_INPUT_PULLDOWN,
0) /* (L20) MMC1_CLK */
AM64X_IOPAD(
0x0290, PIN_INPUT,
0) /* MMC1_CLKLB */
AM64X_IOPAD(
0x0294, PIN_INPUT_PULLUP,
0) /* (J19) MMC1_CMD */
AM64X_IOPAD(
0x0298, PIN_INPUT_PULLUP,
0) /* (D19) MMC1_SDCD */
>;
bootph-all;
};
main_spi0_pins_default: main-spi0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x020c, PIN_OUTPUT,
7) /* (C13) SPI0_CS1.GPIO1_43 */
AM64X_IOPAD(
0x0210, PIN_INPUT,
0) /* (D13) SPI0_CLK */
AM64X_IOPAD(
0x0214, PIN_OUTPUT,
0) /* (A13) SPI0_D0 */
AM64X_IOPAD(
0x0218, PIN_INPUT,
0) /* (A14) SPI0_D1 */
>;
};
main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0230, PIN_INPUT,
0) /* (D15) UART0_RXD */
AM64X_IOPAD(
0x0234, PIN_OUTPUT,
0) /* (C16) UART0_TXD */
>;
bootph-all;
};
main_uart1_pins_default: main-uart1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x0248, PIN_INPUT,
0) /* (D16) UART1_CTSn */
AM64X_IOPAD(
0x024C, PIN_OUTPUT,
0) /* (E16) UART1_RTSn */
AM64X_IOPAD(
0x0240, PIN_INPUT,
0) /* (E15) UART1_RXD */
AM64X_IOPAD(
0x0244, PIN_OUTPUT,
0) /* (E14) UART1_TXD */
>;
};
main_usb0_pins_default: main-usb0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x02a8, PIN_OUTPUT,
0) /* (E19) USB0_DRVVBUS */
>;
};
user_leds_pins_default: user-leds-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(
0x003c, PIN_OUTPUT,
7) /* (T20) GPMC0_AD0.GPIO0_15 */
AM64X_IOPAD(
0x0040, PIN_OUTPUT,
7) /* (U21) GPMC0_AD1.GPIO0_16 */
>;
};
};
&icssg0_mdio {
pinctrl-names = "default";
pinctrl-
0 = <&icssg0_mdio_pins_default &clkout0_pins_default>;
assigned-clocks = <&k3_clks
157 123>;
assigned-clock-parents = <&k3_clks
157 125>;
status = "okay";
icssg0_phy1: ethernet-phy@
1 {
compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.
3-c22";
reg = <
0x1>;
tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
reset-gpios = <&main_gpio1
18 GPIO_ACTIVE_LOW>;
reset-assert-us = <
1000>;
reset-deassert-us = <
1000>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
};
icssg0_phy2: ethernet-phy@
2 {
compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.
3-c22";
reg = <
0x2>;
tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
reset-gpios = <&main_gpio1
19 GPIO_ACTIVE_LOW>;
reset-assert-us = <
1000>;
reset-deassert-us = <
1000>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
};
};
&i2c_som_rtc {
trickle-resistor-ohms = <
3000>;
};
&main_i2c1 {
pinctrl-names = "default";
pinctrl-
0 = <&main_i2c1_pins_default>;
clock-frequency = <
400000>;
status = "okay";
eeprom@
51 {
compatible = "atmel,
24c02";
pagesize = <
16>;
reg = <
0x51>;
};
led-controller@
62 {
compatible = "nxp,pca9533";
reg = <
0x62>;
led-
3 {
label = "red:user";
type = <PCA9532_TYPE_LED>;
};
led-
4 {
label = "green:user";
type = <PCA9532_TYPE_LED>;
};
led-
5 {
label = "blue:user";
type = <PCA9532_TYPE_LED>;
};
};
};
&main_mcan0 {
pinctrl-names = "default";
pinctrl-
0 = <&main_mcan0_pins_default>;
phys = <&can_tc1>;
status = "okay";
};
&main_mcan1 {
pinctrl-names = "default";
pinctrl-
0 = <&main_mcan1_pins_default>;
phys = <&can_tc2>;
status = "okay";
};
&main_spi0 {
pinctrl-names = "default";
pinctrl-
0 = <&main_spi0_pins_default>;
cs-gpios = <
0>, <&main_gpio1
43 GPIO_ACTIVE_LOW>;
ti,pindir-d0-out-d1-in;
status = "okay";
tpm@
1 {
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
reg = <
1>;
spi-max-frequency = <
10000000>;
};
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-
0 = <&main_uart0_pins_default>;
bootph-all;
status = "okay";
};
&main_uart1 {
pinctrl-names = "default";
pinctrl-
0 = <&main_uart1_pins_default>;
uart-has-rtscts;
status = "okay";
};
&sdhci1 {
vmmc-supply = <&vcc_3v3_mmc>;
pinctrl-names = "default";
pinctrl-
0 = <&main_mmc1_pins_default>;
disable-wp;
no-
1-
8-v;
bootph-all;
status = "okay";
};
&serdes0 {
serdes0_pcie_usb_link: phy@
0 {
reg = <
0>;
cdns,num-lanes = <
1>;
#phy-cells = <
0>;
cdns,phy-type = <PHY_TYPE_USB3>;
resets = <&serdes_wiz0
1>;
};
};
&serdes_ln_ctrl {
idle-states = <AM64_SERDES0_LANE0_USB>;
};
&usbss0 {
ti,vbus-divider;
};
&usb0 {
pinctrl-names = "default";
pinctrl-
0 = <&main_usb0_pins_default>;
dr_mode = "host";
maximum-speed = "super-speed";
phys = <&serdes0_pcie_usb_link>;
phy-names = "cdns3,usb3-phy";
};