Impressum pinctrl-mt2701.c
Sprache: unbekannt
// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2015 MediaTek Inc. * Author: Biao Huang <biao.huang@mediatek.com> #include <dt-bindings/pinctrl/mt65xx.h>#include <linux/module.h>#include <linux/of.h>#include <linux/platform_device.h>#include <linux/pinctrl/pinctrl.h>#include <linux/regmap.h>#include "pinctrl-mtk-common.h" #include "pinctrl-mtk-mt2701.h" /** * struct mtk_spec_pinmux_set * - For special pins' mode setting * @pin: The pin number. * @offset: The offset of extra setting register. * @bit: The bit of extra setting register. struct mtk_spec_pinmux_set {unsigned short pin;unsigned short offset;unsigned char bit;#define MTK_PINMUX_SPEC(_pin, _offset, _bit) \static const struct mtk_drv_group_desc mt2701_drv_grp[] = {/* 0E4E8SR 4/8/12/16 */ 4 , 16 , 1 , 2 , 4 ),/* 0E2E4SR 2/4/6/8 */ 2 , 8 , 1 , 2 , 2 ),/* E8E4E2 2/4/6/8/10/12/14/16 */ 2 , 16 , 0 , 2 , 2 )static const struct mtk_pin_drv_grp mt2701_pin_drv[] = {0 , 0 xf50, 0 , 1 ),1 , 0 xf50, 0 , 1 ),2 , 0 xf50, 0 , 1 ),3 , 0 xf50, 0 , 1 ),4 , 0 xf50, 0 , 1 ),5 , 0 xf50, 0 , 1 ),6 , 0 xf50, 0 , 1 ),7 , 0 xf50, 4 , 1 ),8 , 0 xf50, 4 , 1 ),9 , 0 xf50, 4 , 1 ),10 , 0 xf50, 8 , 1 ),11 , 0 xf50, 8 , 1 ),12 , 0 xf50, 8 , 1 ),13 , 0 xf50, 8 , 1 ),14 , 0 xf50, 12 , 0 ),15 , 0 xf50, 12 , 0 ),16 , 0 xf60, 0 , 0 ),17 , 0 xf60, 0 , 0 ),18 , 0 xf60, 4 , 0 ),19 , 0 xf60, 4 , 0 ),20 , 0 xf60, 4 , 0 ),21 , 0 xf60, 4 , 0 ),22 , 0 xf60, 8 , 0 ),23 , 0 xf60, 8 , 0 ),24 , 0 xf60, 8 , 0 ),25 , 0 xf60, 8 , 0 ),26 , 0 xf60, 8 , 0 ),27 , 0 xf60, 12 , 0 ),28 , 0 xf60, 12 , 0 ),29 , 0 xf60, 12 , 0 ),30 , 0 xf60, 0 , 0 ),31 , 0 xf60, 0 , 0 ),32 , 0 xf60, 0 , 0 ),33 , 0 xf70, 0 , 0 ),34 , 0 xf70, 0 , 0 ),35 , 0 xf70, 0 , 0 ),36 , 0 xf70, 0 , 0 ),37 , 0 xf70, 0 , 0 ),38 , 0 xf70, 4 , 0 ),39 , 0 xf70, 8 , 1 ),40 , 0 xf70, 8 , 1 ),41 , 0 xf70, 8 , 1 ),42 , 0 xf70, 8 , 1 ),43 , 0 xf70, 12 , 0 ),44 , 0 xf70, 12 , 0 ),45 , 0 xf70, 12 , 0 ),47 , 0 xf80, 0 , 0 ),48 , 0 xf80, 0 , 0 ),49 , 0 xf80, 4 , 0 ),50 , 0 xf70, 4 , 0 ),51 , 0 xf70, 4 , 0 ),52 , 0 xf70, 4 , 0 ),53 , 0 xf80, 12 , 0 ),54 , 0 xf80, 12 , 0 ),55 , 0 xf80, 12 , 0 ),56 , 0 xf80, 12 , 0 ),60 , 0 xf90, 8 , 1 ),61 , 0 xf90, 8 , 1 ),62 , 0 xf90, 8 , 1 ),63 , 0 xf90, 12 , 1 ),64 , 0 xf90, 12 , 1 ),65 , 0 xf90, 12 , 1 ),66 , 0 xfa0, 0 , 1 ),67 , 0 xfa0, 0 , 1 ),68 , 0 xfa0, 0 , 1 ),69 , 0 xfa0, 0 , 1 ),70 , 0 xfa0, 0 , 1 ),71 , 0 xfa0, 0 , 1 ),72 , 0 xf80, 4 , 0 ),73 , 0 xf80, 4 , 0 ),74 , 0 xf80, 4 , 0 ),85 , 0 xda0, 0 , 2 ),86 , 0 xd90, 0 , 2 ),87 , 0 xdb0, 0 , 2 ),88 , 0 xdb0, 0 , 2 ),89 , 0 xdb0, 0 , 2 ),90 , 0 xdb0, 0 , 2 ),105 , 0 xd40, 0 , 2 ),106 , 0 xd30, 0 , 2 ),107 , 0 xd50, 0 , 2 ),108 , 0 xd50, 0 , 2 ),109 , 0 xd50, 0 , 2 ),110 , 0 xd50, 0 , 2 ),111 , 0 xce0, 0 , 2 ),112 , 0 xce0, 0 , 2 ),113 , 0 xce0, 0 , 2 ),114 , 0 xce0, 0 , 2 ),115 , 0 xce0, 0 , 2 ),116 , 0 xcd0, 0 , 2 ),117 , 0 xcc0, 0 , 2 ),118 , 0 xce0, 0 , 2 ),119 , 0 xce0, 0 , 2 ),120 , 0 xce0, 0 , 2 ),121 , 0 xce0, 0 , 2 ),126 , 0 xf80, 4 , 0 ),188 , 0 xf70, 4 , 0 ),189 , 0 xfe0, 8 , 0 ),190 , 0 xfe0, 8 , 0 ),191 , 0 xfe0, 8 , 0 ),192 , 0 xfe0, 8 , 0 ),193 , 0 xfe0, 8 , 0 ),194 , 0 xfe0, 12 , 0 ),195 , 0 xfe0, 12 , 0 ),196 , 0 xfe0, 12 , 0 ),197 , 0 xfe0, 12 , 0 ),198 , 0 xfe0, 12 , 0 ),199 , 0 xf50, 4 , 1 ),200 , 0 xfd0, 0 , 0 ),201 , 0 xfd0, 0 , 0 ),202 , 0 xfd0, 0 , 0 ),203 , 0 xfd0, 4 , 0 ),204 , 0 xfd0, 4 , 0 ),205 , 0 xfd0, 4 , 0 ),206 , 0 xfd0, 4 , 0 ),207 , 0 xfd0, 4 , 0 ),208 , 0 xfd0, 8 , 0 ),209 , 0 xfd0, 8 , 0 ),210 , 0 xfd0, 12 , 1 ),211 , 0 xff0, 0 , 1 ),212 , 0 xff0, 0 , 1 ),213 , 0 xff0, 0 , 1 ),214 , 0 xff0, 0 , 1 ),215 , 0 xff0, 0 , 1 ),216 , 0 xff0, 0 , 1 ),217 , 0 xff0, 0 , 1 ),218 , 0 xff0, 0 , 1 ),219 , 0 xff0, 0 , 1 ),220 , 0 xff0, 0 , 1 ),221 , 0 xff0, 0 , 1 ),222 , 0 xff0, 0 , 1 ),223 , 0 xff0, 0 , 1 ),224 , 0 xff0, 0 , 1 ),225 , 0 xff0, 0 , 1 ),226 , 0 xff0, 0 , 1 ),227 , 0 xff0, 0 , 1 ),228 , 0 xff0, 0 , 1 ),229 , 0 xff0, 0 , 1 ),230 , 0 xff0, 0 , 1 ),231 , 0 xff0, 0 , 1 ),232 , 0 xff0, 0 , 1 ),233 , 0 xff0, 0 , 1 ),234 , 0 xff0, 0 , 1 ),235 , 0 xff0, 0 , 1 ),236 , 0 xff0, 4 , 0 ),237 , 0 xff0, 4 , 0 ),238 , 0 xff0, 4 , 0 ),239 , 0 xff0, 4 , 0 ),240 , 0 xff0, 4 , 0 ),241 , 0 xff0, 4 , 0 ),242 , 0 xff0, 8 , 0 ),243 , 0 xff0, 8 , 0 ),248 , 0 xf00, 0 , 0 ),249 , 0 xfc0, 0 , 2 ),250 , 0 xfc0, 0 , 2 ),251 , 0 xfc0, 0 , 2 ),252 , 0 xfc0, 0 , 2 ),253 , 0 xfc0, 0 , 2 ),254 , 0 xfc0, 0 , 2 ),255 , 0 xfc0, 0 , 2 ),256 , 0 xfc0, 0 , 2 ),257 , 0 xce0, 0 , 2 ),258 , 0 xcb0, 0 , 2 ),259 , 0 xc90, 0 , 2 ),260 , 0 x3a0, 0 , 2 ),261 , 0 xd50, 0 , 2 ),262 , 0 xf00, 8 , 0 ),263 , 0 xf00, 8 , 0 ),264 , 0 xf00, 8 , 0 ),265 , 0 xf00, 8 , 0 ),266 , 0 xf00, 8 , 0 ),267 , 0 xf00, 8 , 0 ),268 , 0 xf00, 8 , 0 ),269 , 0 xf00, 8 , 0 ),270 , 0 xf00, 8 , 0 ),271 , 0 xf00, 8 , 0 ),272 , 0 xf00, 8 , 0 ),273 , 0 xf00, 8 , 0 ),274 , 0 xf00, 8 , 0 ),275 , 0 xf00, 8 , 0 ),276 , 0 xf00, 8 , 0 ),277 , 0 xf00, 8 , 0 ),278 , 0 xf70, 8 , 1 ),static const struct mtk_pin_spec_pupd_set_samereg mt2701_spec_pupd[] = {111 , 0 xd00, 12 , 13 , 14 ), /* ms0 data7 */ 112 , 0 xd00, 8 , 9 , 10 ), /* ms0 data6 */ 113 , 0 xd00, 4 , 5 , 6 ), /* ms0 data5 */ 114 , 0 xd00, 0 , 1 , 2 ), /* ms0 data4 */ 115 , 0 xd10, 0 , 1 , 2 ), /* ms0 rstb */ 116 , 0 xcd0, 8 , 9 , 10 ), /* ms0 cmd */ 117 , 0 xcc0, 8 , 9 , 10 ), /* ms0 clk */ 118 , 0 xcf0, 12 , 13 , 14 ), /* ms0 data3 */ 119 , 0 xcf0, 8 , 9 , 10 ), /* ms0 data2 */ 120 , 0 xcf0, 4 , 5 , 6 ), /* ms0 data1 */ 121 , 0 xcf0, 0 , 1 , 2 ), /* ms0 data0 */ 105 , 0 xd40, 8 , 9 , 10 ), /* ms1 cmd */ 106 , 0 xd30, 8 , 9 , 10 ), /* ms1 clk */ 107 , 0 xd60, 0 , 1 , 2 ), /* ms1 dat0 */ 108 , 0 xd60, 10 , 9 , 8 ), /* ms1 dat1 */ 109 , 0 xd60, 4 , 5 , 6 ), /* ms1 dat2 */ 110 , 0 xc60, 12 , 13 , 14 ), /* ms1 dat3 */ 85 , 0 xda0, 8 , 9 , 10 ), /* ms2 cmd */ 86 , 0 xd90, 8 , 9 , 10 ), /* ms2 clk */ 87 , 0 xdc0, 0 , 1 , 2 ), /* ms2 dat0 */ 88 , 0 xdc0, 10 , 9 , 8 ), /* ms2 dat1 */ 89 , 0 xdc0, 4 , 5 , 6 ), /* ms2 dat2 */ 90 , 0 xdc0, 12 , 13 , 14 ), /* ms2 dat3 */ 249 , 0 x140, 0 , 1 , 2 ), /* ms0e rstb */ 250 , 0 x130, 12 , 13 , 14 ), /* ms0e dat7 */ 251 , 0 x130, 8 , 9 , 10 ), /* ms0e dat6 */ 252 , 0 x130, 4 , 5 , 6 ), /* ms0e dat5 */ 253 , 0 x130, 0 , 1 , 2 ), /* ms0e dat4 */ 254 , 0 xf40, 12 , 13 , 14 ), /* ms0e dat3 */ 255 , 0 xf40, 8 , 9 , 10 ), /* ms0e dat2 */ 256 , 0 xf40, 4 , 5 , 6 ), /* ms0e dat1 */ 257 , 0 xf40, 0 , 1 , 2 ), /* ms0e dat0 */ 258 , 0 xcb0, 8 , 9 , 10 ), /* ms0e cmd */ 259 , 0 xc90, 8 , 9 , 10 ), /* ms0e clk */ 261 , 0 x140, 8 , 9 , 10 ), /* ms1 ins */ static const struct mtk_pin_ies_smt_set mt2701_ies_set[] = {0 , 6 , 0 xb20, 0 ),7 , 9 , 0 xb20, 1 ),10 , 13 , 0 xb30, 3 ),14 , 15 , 0 xb30, 13 ),16 , 17 , 0 xb40, 7 ),18 , 21 , 0 xb40, 13 ),22 , 26 , 0 xb40, 13 ),27 , 29 , 0 xb40, 13 ),30 , 32 , 0 xb40, 7 ),33 , 37 , 0 xb40, 13 ),38 , 38 , 0 xb20, 13 ),39 , 42 , 0 xb40, 13 ),43 , 45 , 0 xb20, 10 ),47 , 48 , 0 xb20, 11 ),49 , 49 , 0 xb20, 12 ),50 , 52 , 0 xb20, 13 ),53 , 56 , 0 xb20, 14 ),57 , 58 , 0 xb20, 15 ),59 , 59 , 0 xb30, 10 ),60 , 62 , 0 xb30, 0 ),63 , 65 , 0 xb30, 1 ),66 , 71 , 0 xb30, 2 ),72 , 74 , 0 xb20, 12 ),75 , 76 , 0 xb30, 3 ),77 , 78 , 0 xb30, 4 ),79 , 82 , 0 xb30, 5 ),83 , 84 , 0 xb30, 2 ),85 , 85 , 0 xda0, 4 ),86 , 86 , 0 xd90, 4 ),87 , 90 , 0 xdb0, 4 ),101 , 104 , 0 xb30, 6 ),105 , 105 , 0 xd40, 4 ),106 , 106 , 0 xd30, 4 ),107 , 110 , 0 xd50, 4 ),111 , 115 , 0 xce0, 4 ),116 , 116 , 0 xcd0, 4 ),117 , 117 , 0 xcc0, 4 ),118 , 121 , 0 xce0, 4 ),122 , 125 , 0 xb30, 7 ),126 , 126 , 0 xb20, 12 ),127 , 142 , 0 xb30, 9 ),143 , 160 , 0 xb30, 10 ),161 , 168 , 0 xb30, 12 ),169 , 183 , 0 xb30, 10 ),184 , 186 , 0 xb30, 9 ),187 , 187 , 0 xb30, 14 ),188 , 188 , 0 xb20, 13 ),189 , 193 , 0 xb30, 15 ),194 , 198 , 0 xb40, 0 ),199 , 199 , 0 xb20, 1 ),200 , 202 , 0 xb40, 1 ),203 , 207 , 0 xb40, 2 ),208 , 209 , 0 xb40, 3 ),210 , 210 , 0 xb40, 4 ),211 , 235 , 0 xb40, 5 ),236 , 241 , 0 xb40, 6 ),242 , 243 , 0 xb40, 7 ),244 , 247 , 0 xb40, 8 ),248 , 248 , 0 xb40, 9 ),249 , 257 , 0 xfc0, 4 ),258 , 258 , 0 xcb0, 4 ),259 , 259 , 0 xc90, 4 ),260 , 260 , 0 x3a0, 4 ),261 , 261 , 0 xd50, 4 ),262 , 277 , 0 xb40, 12 ),278 , 278 , 0 xb40, 13 ),static const struct mtk_pin_ies_smt_set mt2701_smt_set[] = {0 , 6 , 0 xb50, 0 ),7 , 9 , 0 xb50, 1 ),10 , 13 , 0 xb60, 3 ),14 , 15 , 0 xb60, 13 ),16 , 17 , 0 xb70, 7 ),18 , 21 , 0 xb70, 13 ),22 , 26 , 0 xb70, 13 ),27 , 29 , 0 xb70, 13 ),30 , 32 , 0 xb70, 7 ),33 , 37 , 0 xb70, 13 ),38 , 38 , 0 xb50, 13 ),39 , 42 , 0 xb70, 13 ),43 , 45 , 0 xb50, 10 ),47 , 48 , 0 xb50, 11 ),49 , 49 , 0 xb50, 12 ),50 , 52 , 0 xb50, 13 ),53 , 56 , 0 xb50, 14 ),57 , 58 , 0 xb50, 15 ),59 , 59 , 0 xb60, 10 ),60 , 62 , 0 xb60, 0 ),63 , 65 , 0 xb60, 1 ),66 , 71 , 0 xb60, 2 ),72 , 74 , 0 xb50, 12 ),75 , 76 , 0 xb60, 3 ),77 , 78 , 0 xb60, 4 ),79 , 82 , 0 xb60, 5 ),83 , 84 , 0 xb60, 2 ),85 , 85 , 0 xda0, 11 ),86 , 86 , 0 xd90, 11 ),87 , 87 , 0 xdc0, 3 ),88 , 88 , 0 xdc0, 7 ),89 , 89 , 0 xdc0, 11 ),90 , 90 , 0 xdc0, 15 ),101 , 104 , 0 xb60, 6 ),105 , 105 , 0 xd40, 11 ),106 , 106 , 0 xd30, 11 ),107 , 107 , 0 xd60, 3 ),108 , 108 , 0 xd60, 7 ),109 , 109 , 0 xd60, 11 ),110 , 110 , 0 xd60, 15 ),111 , 111 , 0 xd00, 15 ),112 , 112 , 0 xd00, 11 ),113 , 113 , 0 xd00, 7 ),114 , 114 , 0 xd00, 3 ),115 , 115 , 0 xd10, 3 ),116 , 116 , 0 xcd0, 11 ),117 , 117 , 0 xcc0, 11 ),118 , 118 , 0 xcf0, 15 ),119 , 119 , 0 xcf0, 11 ),120 , 120 , 0 xcf0, 7 ),121 , 121 , 0 xcf0, 3 ),122 , 125 , 0 xb60, 7 ),126 , 126 , 0 xb50, 12 ),127 , 142 , 0 xb60, 9 ),143 , 160 , 0 xb60, 10 ),161 , 168 , 0 xb60, 12 ),169 , 183 , 0 xb60, 10 ),184 , 186 , 0 xb60, 9 ),187 , 187 , 0 xb60, 14 ),188 , 188 , 0 xb50, 13 ),189 , 193 , 0 xb60, 15 ),194 , 198 , 0 xb70, 0 ),199 , 199 , 0 xb50, 1 ),200 , 202 , 0 xb70, 1 ),203 , 207 , 0 xb70, 2 ),208 , 209 , 0 xb70, 3 ),210 , 210 , 0 xb70, 4 ),211 , 235 , 0 xb70, 5 ),236 , 241 , 0 xb70, 6 ),242 , 243 , 0 xb70, 7 ),244 , 247 , 0 xb70, 8 ),248 , 248 , 0 xb70, 9 ),249 , 249 , 0 x140, 3 ),250 , 250 , 0 x130, 15 ),251 , 251 , 0 x130, 11 ),252 , 252 , 0 x130, 7 ),253 , 253 , 0 x130, 3 ),254 , 254 , 0 xf40, 15 ),255 , 255 , 0 xf40, 11 ),256 , 256 , 0 xf40, 7 ),257 , 257 , 0 xf40, 3 ),258 , 258 , 0 xcb0, 11 ),259 , 259 , 0 xc90, 11 ),260 , 260 , 0 x3a0, 11 ),261 , 261 , 0 x0b0, 3 ),262 , 277 , 0 xb70, 12 ),278 , 278 , 0 xb70, 13 ),static const struct mtk_spec_pinmux_set mt2701_spec_pinmux[] = {22 , 0 xb10, 3 ),23 , 0 xb10, 4 ),24 , 0 xb10, 5 ),29 , 0 xb10, 9 ),208 , 0 xb10, 7 ),209 , 0 xb10, 8 ),203 , 0 xf20, 0 ),204 , 0 xf20, 1 ),249 , 0 xef0, 0 ),250 , 0 xef0, 0 ),251 , 0 xef0, 0 ),252 , 0 xef0, 0 ),253 , 0 xef0, 0 ),254 , 0 xef0, 0 ),255 , 0 xef0, 0 ),256 , 0 xef0, 0 ),257 , 0 xef0, 0 ),258 , 0 xef0, 0 ),259 , 0 xef0, 0 ),260 , 0 xef0, 0 ),static void mt2701_spec_pinmux_set(struct regmap *reg, unsigned int pin,unsigned int mode)unsigned int i, value, mask;unsigned int info_num = ARRAY_SIZE(mt2701_spec_pinmux);unsigned int spec_flag;for (i = 0 ; i < info_num; i++) {if (pin == mt2701_spec_pinmux[i].pin)break ;if (i == info_num)return ;3 );if (!spec_flag)else 0 ;static void mt2701_spec_dir_set(unsigned int *reg_addr, unsigned int pin)if (pin > 175 )0 x10;static const struct mtk_pinctrl_devdata mt2701_pinctrl_data = {0 x0000,0 x0150,0 x0280,0 x0500,0 x0630,0 x0760,280 ,280 ,4 ,0 x1f,4 ,0 xf,5 ,4 ,6 ,6 ,169 ,16 ,static const struct of_device_id mt2701_pctrl_match[] = {"mediatek,mt2701-pinctrl" , .data = &mt2701_pinctrl_data },"mediatek,mt7623-pinctrl" , .data = &mt2701_pinctrl_data },static struct platform_driver mtk_pinctrl_driver = {"mediatek-mt2701-pinctrl" ,static int __init mtk_pinctrl_init(void )return platform_driver_register(&mtk_pinctrl_driver);
Messung V0.5 in Prozent C=96 H=100 G=97
[zur Elbe Produktseite wechseln0.28QuellennavigatorsAnalyse erneut starten2026-06-08]
2026-08-25
