Quelle phy-qcom-qmp-usb-legacy.c Sprache: unbekannt
// SPDX-License-Identifier: GPL-2.0 /* * Copyright ( c ) 2017 , The Linux Foundation . All rights reserved . #include <linux/clk.h>#include <linux/clk-provider.h>#include <linux/delay.h>#include <linux/err.h>#include <linux/io.h>#include <linux/iopoll.h>#include <linux/kernel.h>#include <linux/module.h>#include <linux/of.h>#include <linux/of_device.h>#include <linux/of_address.h>#include <linux/phy/phy.h>#include <linux/platform_device.h>#include <linux/regulator/consumer.h>#include <linux/reset.h>#include <linux/slab.h>#include "phy-qcom-qmp.h" #include "phy-qcom-qmp-pcs-misc-v3.h" #include "phy-qcom-qmp-pcs-usb-v4.h" #include "phy-qcom-qmp-pcs-usb-v5.h" #include "phy-qcom-qmp-dp-com-v3.h" /* QPHY_V3_DP_COM_RESET_OVRD_CTRL register bits */ /* DP PHY soft reset */ #define SW_DPPHY_RESET BIT(0 )/* mux to select DP PHY reset control, 0:HW control, 1: software reset */ #define SW_DPPHY_RESET_MUX BIT(1 )/* USB3 PHY soft reset */ #define SW_USB3PHY_RESET BIT(2 )/* mux to select USB3 PHY reset control, 0:HW control, 1: software reset */ #define SW_USB3PHY_RESET_MUX BIT(3 )/* QPHY_V3_DP_COM_PHY_MODE_CTRL register bits */ #define USB3_MODE BIT(0 ) /* enables USB3 mode */ #define DP_MODE BIT(1 ) /* enables DP mode */ #define PHY_INIT_COMPLETE_TIMEOUT 10000 struct qmp_phy_init_tbl {unsigned int offset;unsigned int val;/* * mask of lanes for which this register is written * for cases when second lane needs different values #define QMP_PHY_INIT_CFG(o, v) \0 xff, \#define QMP_PHY_INIT_CFG_LANE(o, v, l) \/* set of registers with offsets different per-PHY */ enum qphy_reg_layout {/* PCS registers */ /* Keep last to ensure regs_layout arrays are properly initialized */ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {static const unsigned int qmp_v4_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {/* In PCS_USB */ static const unsigned int qmp_v5_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {/* In PCS_USB */ static const struct qmp_phy_init_tbl qmp_v3_usb3_serdes_tbl[] = {0 x07),0 x14),0 x08),0 x30),0 x02),0 x08),0 x16),0 x01),0 x80),0 x82),0 xab),0 xea),0 x02),0 x06),0 x16),0 x36),0 x00),0 x3f),0 x01),0 xc9),0 x0a),0 x00),0 x34),0 x15),0 x04),0 x00),0 x00),0 x00),0 x0a),0 x01),0 x31),0 x01),0 x00),0 x00),0 x85),0 x07),static const struct qmp_phy_init_tbl qmp_v3_usb3_tx_tbl[] = {0 x10),0 x12),0 x16),0 x09),0 x06),static const struct qmp_phy_init_tbl qmp_v3_usb3_rx_tbl[] = {0 x0b),0 x0f),0 x4e),0 x18),0 x77),0 x80),0 x03),0 x16),0 x75),static const struct qmp_phy_init_tbl qmp_v3_usb3_pcs_tbl[] = {/* FLL settings */ 0 x83),0 x09),0 xa2),0 x40),0 x02),/* Lock Det settings */ 0 xd1),0 x1f),0 x47),0 x1b),0 xba),0 x9f),0 x9f),0 xb7),0 x4e),0 x65),0 x6b),0 x15),0 x0d),0 x15),0 x0d),0 x15),0 x0d),0 x15),0 x1d),0 x15),0 x0d),0 x15),0 x0d),0 x02),0 x04),0 x44),0 x04),0 xe7),0 x03),0 x40),0 x00),0 x75),0 x86),0 x13),static const struct qmp_phy_init_tbl sm8150_usb3_serdes_tbl[] = {0 x01),0 x31),0 x01),0 xde),0 x07),0 xde),0 x07),0 x0a),0 x20),0 x06),0 x06),0 x16),0 x16),0 x36),0 x36),0 x1a),0 x04),0 x14),0 x34),0 x34),0 x82),0 x82),0 x82),0 xab),0 xea),0 x02),0 x02),0 xab),0 xea),0 x02),0 x24),0 x24),0 x02),0 x01),0 x08),0 xca),0 x1e),0 xca),0 x1e),0 x11),static const struct qmp_phy_init_tbl sm8150_usb3_tx_tbl[] = {0 x00),0 x00),0 xd5),0 x12),0 x20),static const struct qmp_phy_init_tbl sm8150_usb3_rx_tbl[] = {0 x05),0 x2f),0 x7f),0 xff),0 x0f),0 x99),0 x04),0 x08),0 x05),0 x05),0 x54),0 x0e),0 x0f),0 x4a),0 x0a),0 xc0),0 x00),0 x77),0 x04),0 x0e),0 xbf),0 xbf),0 x3f),0 x7f),0 x94),0 xdc),0 xdc),0 x5c),0 x0b),0 xb3),0 x04),0 x38),0 xa0),0 x0c),0 x1f),0 x10),static const struct qmp_phy_init_tbl sm8150_usb3_pcs_tbl[] = {/* Lock Det settings */ 0 xd0),0 x07),0 x13),0 x21),0 xaa),0 x0a),0 x88),0 x13),0 x0c),0 x4b),0 x10),static const struct qmp_phy_init_tbl sm8150_usb3_pcs_usb_tbl[] = {0 xf8),0 x07),static const struct qmp_phy_init_tbl sm8250_usb3_tx_tbl[] = {0 x60),0 x60),0 x11),0 x02),0 xd5),0 x12),0 x40, 1 ),0 x54, 2 ),static const struct qmp_phy_init_tbl sm8250_usb3_rx_tbl[] = {0 x06),0 x2f),0 x7f),0 xff),0 x0f),0 x99),0 x04),0 x08),0 x05),0 x05),0 x54),0 x0c),0 x0f),0 x4a),0 x0a),0 xc0),0 x00),0 x77),0 x04),0 x0e),0 xff, 1 ),0 x7f, 2 ),0 x7f, 1 ),0 xff, 2 ),0 x7f),0 x7f),0 x97),0 xdc),0 xdc),0 x5c),0 x7b),0 xb4),0 x04),0 x38),0 xa0),0 x0c),0 x1f),0 x10),static const struct qmp_phy_init_tbl sm8250_usb3_pcs_tbl[] = {0 xd0),0 x07),0 x20),0 x13),0 x21),0 xa9),0 x0a),0 x88),0 x13),0 x0c),0 x4b),0 x10),static const struct qmp_phy_init_tbl sm8250_usb3_pcs_usb_tbl[] = {0 xf8),0 x07),static const struct qmp_phy_init_tbl sm8350_usb3_tx_tbl[] = {0 x00),0 x00),0 x16),0 x0e),0 x35),0 x3f),0 x7f),0 x3f),0 x12),0 x21),static const struct qmp_phy_init_tbl sm8350_usb3_rx_tbl[] = {0 x0a),0 x05),0 x2f),0 x7f),0 xff),0 x0f),0 x99),0 x08),0 x08),0 x00),0 x04),0 x54),0 x0f),0 x0f),0 x4a),0 x0a),0 xc0),0 x00),0 x47),0 x04),0 x0e),0 xbb),0 x7b),0 xbb),0 x3d, 1 ),0 x3c, 2 ),0 xdb),0 x64),0 x24),0 xd2),0 x13),0 xa9),0 x04),0 x38),0 xa0),0 x0c),0 x00),0 x10),static const struct qmp_phy_init_tbl sm8350_usb3_pcs_tbl[] = {0 xe7),0 x03),0 xd0),0 x07),0 x20),0 x13),0 x21),0 xaa),0 x0a),0 x88),0 x13),0 x0c),0 x4b),0 x10),static const struct qmp_phy_init_tbl sm8350_usb3_pcs_usb_tbl[] = {0 x40),0 x00),0 xf8),0 x07),struct qmp_usb_legacy_offsets {/* struct qmp_phy_cfg - per-PHY initialization config */ struct qmp_phy_cfg {const struct qmp_usb_legacy_offsets *offsets;/* Init sequence for PHY blocks - serdes, tx, rx, pcs */ const struct qmp_phy_init_tbl *serdes_tbl;int serdes_tbl_num;const struct qmp_phy_init_tbl *tx_tbl;int tx_tbl_num;const struct qmp_phy_init_tbl *rx_tbl;int rx_tbl_num;const struct qmp_phy_init_tbl *pcs_tbl;int pcs_tbl_num;const struct qmp_phy_init_tbl *pcs_usb_tbl;int pcs_usb_tbl_num;/* clock ids to be requested */ const char * const *clk_list;int num_clks;/* resets to be requested */ const char * const *reset_list;int num_resets;/* regulators to be requested */ const char * const *vreg_list;int num_vregs;/* array of registers with different offsets */ const unsigned int *regs;/* Offset from PCS to PCS_USB region */ unsigned int pcs_usb_offset;struct qmp_usb {struct device *dev;const struct qmp_phy_cfg *cfg;void __iomem *serdes;void __iomem *pcs;void __iomem *pcs_misc;void __iomem *pcs_usb;void __iomem *tx;void __iomem *rx;void __iomem *tx2;void __iomem *rx2;void __iomem *dp_com;struct clk *pipe_clk;struct clk_bulk_data *clks;struct reset_control_bulk_data *resets;struct regulator_bulk_data *vregs;enum phy_mode mode;struct phy *phy;struct clk_fixed_rate pipe_clk_fixed;static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)/* ensure that above write is through */ static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val)/* ensure that above write is through */ /* list of clocks required by phy */ static const char * const qmp_v3_phy_clk_l[] = {"aux" , "cfg_ahb" , "ref" , "com_aux" ,static const char * const qmp_v4_ref_phy_clk_l[] = {"aux" , "ref_clk_src" , "ref" , "com_aux" ,/* the primary usb3 phy on sm8250 doesn't have a ref clock */ static const char * const qmp_v4_sm8250_usbphy_clk_l[] = {"aux" , "ref_clk_src" , "com_aux" /* list of resets */ static const char * const msm8996_usb3phy_reset_l[] = {"phy" , "common" ,static const char * const sc7180_usb3phy_reset_l[] = {"phy" ,/* list of regulators */ static const char * const qmp_phy_vreg_l[] = {"vdda-phy" , "vdda-pll" ,static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = {static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {0 x300,static const struct qmp_phy_cfg sm8250_usb3phy_cfg = {0 x300,static const struct qmp_phy_cfg sm8350_usb3phy_cfg = {0 x300,static void qmp_usb_legacy_configure_lane(void __iomem *base,const struct qmp_phy_init_tbl tbl[],int num,int i;const struct qmp_phy_init_tbl *t = tbl;if (!t)return ;for (i = 0 ; i < num; i++, t++) {if (!(t->lane_mask & lane_mask))continue ;static void qmp_usb_legacy_configure(void __iomem *base,const struct qmp_phy_init_tbl tbl[],int num)0 xff);static int qmp_usb_legacy_serdes_init(struct qmp_usb *qmp)const struct qmp_phy_cfg *cfg = qmp->cfg;void __iomem *serdes = qmp->serdes;const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl;int serdes_tbl_num = cfg->serdes_tbl_num;return 0 ;static void qmp_usb_legacy_init_dp_com(struct phy *phy)struct qmp_usb *qmp = phy_get_drvdata(phy);void __iomem *dp_com = qmp->dp_com;/* override hardware control for reset of qmp phy */ /* Default type-c orientation, i.e CC1 */ 0 x02);/* bring both QMP USB and QMP DP PHYs PCS block out of reset */ 0 x03);static int qmp_usb_legacy_init(struct phy *phy)struct qmp_usb *qmp = phy_get_drvdata(phy);const struct qmp_phy_cfg *cfg = qmp->cfg;void __iomem *pcs = qmp->pcs;int ret;if (ret) {"failed to enable regulators, err=%d\n" , ret);return ret;if (ret) {"reset assert failed\n" );goto err_disable_regulators;if (ret) {"reset deassert failed\n" );goto err_disable_regulators;if (ret)goto err_assert_reset;return 0 ;return ret;static int qmp_usb_legacy_exit(struct phy *phy)struct qmp_usb *qmp = phy_get_drvdata(phy);const struct qmp_phy_cfg *cfg = qmp->cfg;return 0 ;static int qmp_usb_legacy_power_on(struct phy *phy)struct qmp_usb *qmp = phy_get_drvdata(phy);const struct qmp_phy_cfg *cfg = qmp->cfg;void __iomem *tx = qmp->tx;void __iomem *rx = qmp->rx;void __iomem *pcs = qmp->pcs;void __iomem *status;unsigned int val;int ret;if (ret) {"pipe_clk enable failed err=%d\n" , ret);return ret;/* Tx, Rx, and PCS configurations */ 1 );1 );2 );2 );10 , 20 );/* Pull PHY out of reset state */ /* start SerDes and Phy-Coding-Sublayer */ 200 ,if (ret) {"phy initialization timed-out\n" );goto err_disable_pipe_clk;return 0 ;return ret;static int qmp_usb_legacy_power_off(struct phy *phy)struct qmp_usb *qmp = phy_get_drvdata(phy);const struct qmp_phy_cfg *cfg = qmp->cfg;/* PHY reset */ /* stop SerDes and Phy-Coding-Sublayer */ /* Put PHY into POWER DOWN state: active low */ return 0 ;static int qmp_usb_legacy_enable(struct phy *phy)int ret;if (ret)return ret;if (ret)return ret;static int qmp_usb_legacy_disable(struct phy *phy)int ret;if (ret)return ret;return qmp_usb_legacy_exit(phy);static int qmp_usb_legacy_set_mode(struct phy *phy, enum phy_mode mode, int submode)struct qmp_usb *qmp = phy_get_drvdata(phy);return 0 ;static const struct phy_ops qmp_usb_legacy_phy_ops = {exit = qmp_usb_legacy_disable,static void qmp_usb_legacy_enable_autonomous_mode(struct qmp_usb *qmp)const struct qmp_phy_cfg *cfg = qmp->cfg;void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs;void __iomem *pcs_misc = qmp->pcs_misc;if (qmp->mode == PHY_MODE_USB_HOST_SS ||else /* Clear any pending interrupts status */ /* Writing 1 followed by 0 clears the interrupt */ /* Enable required PHY autonomous mode interrupts */ /* Enable i/o clamp_n for autonomous mode */ if (pcs_misc)static void qmp_usb_legacy_disable_autonomous_mode(struct qmp_usb *qmp)const struct qmp_phy_cfg *cfg = qmp->cfg;void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs;void __iomem *pcs_misc = qmp->pcs_misc;/* Disable i/o clamp_n on resume for normal mode */ if (pcs_misc)/* Writing 1 followed by 0 clears the interrupt */ static int __maybe_unused qmp_usb_legacy_runtime_suspend(struct device *dev)struct qmp_usb *qmp = dev_get_drvdata(dev);const struct qmp_phy_cfg *cfg = qmp->cfg;"Suspending QMP phy, mode:%d\n" , qmp->mode);if (!qmp->phy->init_count) {"PHY not initialized, bailing out\n" );return 0 ;return 0 ;static int __maybe_unused qmp_usb_legacy_runtime_resume(struct device *dev)struct qmp_usb *qmp = dev_get_drvdata(dev);const struct qmp_phy_cfg *cfg = qmp->cfg;int ret = 0 ;"Resuming QMP phy, mode:%d\n" , qmp->mode);if (!qmp->phy->init_count) {"PHY not initialized, bailing out\n" );return 0 ;if (ret)return ret;if (ret) {"pipe_clk enable failed, err=%d\n" , ret);return ret;return 0 ;static const struct dev_pm_ops qmp_usb_legacy_pm_ops = {static int qmp_usb_legacy_vreg_init(struct qmp_usb *qmp)const struct qmp_phy_cfg *cfg = qmp->cfg;struct device *dev = qmp->dev;int num = cfg->num_vregs;int i;sizeof (*qmp->vregs), GFP_KERNEL);if (!qmp->vregs)return -ENOMEM;for (i = 0 ; i < num; i++)return devm_regulator_bulk_get(dev, num, qmp->vregs);static int qmp_usb_legacy_reset_init(struct qmp_usb *qmp)const struct qmp_phy_cfg *cfg = qmp->cfg;struct device *dev = qmp->dev;int i;int ret;sizeof (*qmp->resets), GFP_KERNEL);if (!qmp->resets)return -ENOMEM;for (i = 0 ; i < cfg->num_resets; i++)if (ret)return dev_err_probe(dev, ret, "failed to get resets\n" );return 0 ;static int qmp_usb_legacy_clk_init(struct qmp_usb *qmp)const struct qmp_phy_cfg *cfg = qmp->cfg;struct device *dev = qmp->dev;int num = cfg->num_clks;int i;sizeof (*qmp->clks), GFP_KERNEL);if (!qmp->clks)return -ENOMEM;for (i = 0 ; i < num; i++)return devm_clk_bulk_get(dev, num, qmp->clks);static void phy_clk_release_provider(void *res)/* * Register a fixed rate pipe clock . * * The < s > _ pipe_clksrc generated by PHY goes to the GCC that gate * controls it . The < s > _ pipe_clk coming out of the GCC is requested * by the PHY driver for its operations . * We register the < s > _ pipe_clksrc here . The gcc driver takes care * of assigning this < s > _ pipe_clksrc as parent to < s > _ pipe_clk . * Below picture shows this relationship . * * + - - - - - - - - - - - - - - - + * | PHY block | < < - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + * | | | * | + - - - - - - - + | + - - - - - + | * I / P - - - ^ - - > | PLL | - - - ^ - - - > pipe_clksrc - - - > | GCC | - - - > pipe_clk - - - + * clk | + - - - - - - - + | + - - - - - + * + - - - - - - - - - - - - - - - + static int phy_pipe_clk_register(struct qmp_usb *qmp, struct device_node *np)struct clk_fixed_rate *fixed = &qmp->pipe_clk_fixed;struct clk_init_data init = { };int ret;"clock-output-names" , &init.name);if (ret) {"%pOFn: No clock-output-names\n" , np);return ret;/* controllers using QMP phys use 125MHz pipe clock interface */ 125000000 ;if (ret)return ret;if (ret)return ret;/* * Roll a devm action because the clock provider is the child node , but * the child node is not actually a device . return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np);static int qmp_usb_legacy_parse_dt_legacy(struct qmp_usb *qmp, struct device_node *np)struct platform_device *pdev = to_platform_device(qmp->dev);const struct qmp_phy_cfg *cfg = qmp->cfg;struct device *dev = qmp->dev;0 );if (IS_ERR(qmp->serdes))return PTR_ERR(qmp->serdes);1 );if (IS_ERR(qmp->dp_com))return PTR_ERR(qmp->dp_com);/* * Get memory resources for the PHY : * Resources are indexed as : tx - > 0 ; rx - > 1 ; pcs - > 2 . * For dual lane PHYs : tx2 - > 3 , rx2 - > 4 , pcs_misc ( optional ) - > 5 * For single lane PHYs : pcs_misc ( optional ) - > 3 . 0 , NULL);if (IS_ERR(qmp->tx))return PTR_ERR(qmp->tx);1 , NULL);if (IS_ERR(qmp->rx))return PTR_ERR(qmp->rx);2 , NULL);if (IS_ERR(qmp->pcs))return PTR_ERR(qmp->pcs);if (cfg->pcs_usb_offset)3 , NULL);if (IS_ERR(qmp->tx2))return PTR_ERR(qmp->tx2);4 , NULL);if (IS_ERR(qmp->rx2))return PTR_ERR(qmp->rx2);5 , NULL);if (IS_ERR(qmp->pcs_misc)) {"PHY pcs_misc-reg not used\n" );if (IS_ERR(qmp->pipe_clk)) {return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk),"failed to get pipe clock\n" );return 0 ;static int qmp_usb_legacy_parse_dt(struct qmp_usb *qmp)struct platform_device *pdev = to_platform_device(qmp->dev);const struct qmp_phy_cfg *cfg = qmp->cfg;const struct qmp_usb_legacy_offsets *offs = cfg->offsets;struct device *dev = qmp->dev;void __iomem *base;if (!offs)return -EINVAL;0 );if (IS_ERR(base))return PTR_ERR(base);"pipe" );if (IS_ERR(qmp->pipe_clk)) {return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk),"failed to get pipe clock\n" );return 0 ;static int qmp_usb_legacy_probe(struct platform_device *pdev)struct device *dev = &pdev->dev;struct phy_provider *phy_provider;struct device_node *np;struct qmp_usb *qmp;int ret;sizeof (*qmp), GFP_KERNEL);if (!qmp)return -ENOMEM;if (!qmp->cfg)return -EINVAL;if (ret)return ret;if (ret)return ret;if (ret)return ret;/* Check for legacy binding with child node. */ if (np) {else {if (ret)goto err_node_put;if (ret)goto err_node_put;/* * Prevent runtime pm from being ON by default . Users can enable * it using power / control in sysfs . if (ret)goto err_node_put;if (IS_ERR(qmp->phy)) {"failed to create PHY: %d\n" , ret);goto err_node_put;return PTR_ERR_OR_ZERO(phy_provider);return ret;static const struct of_device_id qmp_usb_legacy_of_match_table[] = {"qcom,sc7180-qmp-usb3-phy" ,"qcom,sc8180x-qmp-usb3-phy" ,"qcom,sdm845-qmp-usb3-phy" ,"qcom,sm8150-qmp-usb3-phy" ,"qcom,sm8250-qmp-usb3-phy" ,"qcom,sm8350-qmp-usb3-phy" ,"qcom,sm8450-qmp-usb3-phy" ,static struct platform_driver qmp_usb_legacy_driver = {"qcom-qmp-usb-legacy-phy" ,"Vivek Gautam <vivek.gautam@codeaurora.org>" );"Qualcomm QMP legacy USB+DP PHY driver" );"GPL v2" );
Messung V0.5 in Prozent C=97 H=95 G=95
[0.19QuellennavigatorsProjekt 2026-10-01]
2026-10-10
