#include"jit/AtomicOp.h" #include"jit/IonTypes.h" #include"jit/JitAllocPolicy.h" #include"jit/Label.h" #include"jit/RegisterAllocator.h" #include"jit/Registers.h" #include"jit/RegisterSets.h" #ifdefined(JS_CODEGEN_ARM) # include "jit/arm/Assembler-arm.h" #endif #ifdefined(JS_CODEGEN_X64) || defined(JS_CODEGEN_X86) # include "jit/x86-shared/Architecture-x86-shared.h" # include "jit/x86-shared/Assembler-x86-shared.h" #endif #ifdefined(JS_CODEGEN_MIPS64) # include "jit/mips-shared/Assembler-mips-shared.h" # include "jit/mips64/Assembler-mips64.h" #endif #ifdefined(JS_CODEGEN_LOONG64) # include "jit/loong64/Assembler-loong64.h" #endif #ifdefined(JS_CODEGEN_RISCV64) # include "jit/riscv64/Assembler-riscv64.h" #endif #include"js/ScalarType.h" #include"util/Memory.h" #include"wasm/WasmCodegenTypes.h" #include"wasm/WasmDebugFrame.h" #include"wasm/WasmGC.h" #include"wasm/WasmGcObject.h" #include"wasm/WasmGenerator.h" #include"wasm/WasmInstance.h" #include"wasm/WasmOpIter.h" #include"wasm/WasmSignalHandlers.h" #include"wasm/WasmStubs.h" #include"wasm/WasmValidate.h"
namespace js { namespace wasm {
using HandleNaNSpecially = bool; using InvertBranch = bool; using IsKnownNotZero = bool; using IsUnsigned = bool; using IsRemainder = bool; using NeedsBoundsCheck = bool; using WantResult = bool; using ZeroOnOverflow = bool;
class BaseStackFrame;
enumclass RestoreState { // Don't reload anything
None, // Reload just the pinned registers, assuming the instance is still valid
PinnedRegs, // Reload the instance register, pinned registers, and perform a realm switch
All,
}; enumclass RhsDestOp { True = true };
// Compiler configuration. // // The following internal configuration #defines are used. The configuration is // partly below in this file, partly in WasmBCRegDefs.h. // // RABALDR_PIN_INSTANCE // InstanceReg is not allocatable and always holds the current Instance*, // except in known contexts where it could have been clobbered, such as after // certain calls. // // RABALDR_ZERO_EXTENDS // The canonical representation of a 32-bit value in a 64-bit register is // zero-extended. For 64-bit platforms only. See comment block "64-bit GPRs // carrying 32-bit values" in MacroAssembler.h. // // RABALDR_CHUNKY_STACK // The platform must allocate the CPU stack in chunks and not word-at-a-time // due to SP alignment requirements (ARM64 for now). // // RABALDR_INT_DIV_I64_CALLOUT // The platform calls out to the runtime to divide i64/u64. // // RABALDR_I64_TO_FLOAT_CALLOUT // The platform calls out to the runtime for i64 -> fXX conversions. // // RABALDR_FLOAT_TO_I64_CALLOUT // The platform calls out to the runtime for fXX -> i64 conversions. // // RABALDR_SCRATCH_<TypeName> // The baseline compiler has its own scratch registers for the given type, it // does not use the MacroAssembler's scratch. This is really an anachronism - // the baseline compiler should never use the MacroAssembler's scratches. // // RABALDR_SCRATCH_F32_ALIASES_F64 // On a platform where the baseline compiler has its own F32 and F64 // scratches, these are the same register.
// Max number of pushes onto the value stack for any opcode or emitter that // does not push a variable, unbounded amount (anything with multiple // results). This includes also intermediate pushes such as values pushed as // parameters for builtin calls. // // This limit is set quite high on purpose, so as to avoid brittleness. The // true max value is likely no more than four or five.
static constexpr size_t MaxPushesPerOpcode = 10;
} // namespace wasm
} // namespace js
#endif// wasm_wasm_baseline_defs_h
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