// The following functions are public so that TestFn can use them...
// Returns a vector of address used by any of the repeat methods // involving an "A" (e.g. RepeatA). virtual std::vector<Addr> GetAddresses() = 0;
// Returns a vector of registers used by any of the repeat methods // involving an "R" (e.g. RepeatR). virtual ArrayRef<const Reg> GetRegisters() = 0;
// Returns a vector of fp-registers used by any of the repeat methods // involving an "F" (e.g. RepeatFF). virtual ArrayRef<const FPReg> GetFPRegisters() {
UNIMPLEMENTED(FATAL) << "Architecture does not support floating-point registers";
UNREACHABLE();
}
// Returns a vector of dedicated simd-registers used by any of the repeat // methods involving an "V" (e.g. RepeatVV). virtual ArrayRef<const VecReg> GetVectorRegisters() {
UNIMPLEMENTED(FATAL) << "Architecture does not support vector registers";
UNREACHABLE();
}
// Secondary register names are the secondary view on registers, e.g., 32b on 64b systems. virtual std::string GetSecondaryRegisterName([[maybe_unused]] const Reg& reg) {
UNIMPLEMENTED(FATAL) << "Architecture does not support secondary registers";
UNREACHABLE();
}
// Tertiary register names are the tertiary view on registers, e.g., 16b on 64b systems. virtual std::string GetTertiaryRegisterName([[maybe_unused]] const Reg& reg) {
UNIMPLEMENTED(FATAL) << "Architecture does not support tertiary registers";
UNREACHABLE();
}
// Quaternary register names are the quaternary view on registers, e.g., 8b on 64b systems. virtual std::string GetQuaternaryRegisterName([[maybe_unused]] const Reg& reg) {
UNIMPLEMENTED(FATAL) << "Architecture does not support quaternary registers";
UNREACHABLE();
}
// Override this to set up any architecture-specific things, e.g., CPU revision. virtual Ass* CreateAssembler(ArenaAllocator* allocator) { returnnew (allocator) Ass(allocator);
}
// Override this to set up any architecture-specific things, e.g., register vectors. virtualvoid SetUpHelpers() {}
// Create a couple of immediate values up to the number of bytes given. virtual std::vector<int64_t> CreateImmediateValues(size_t imm_bytes, bool as_uint = false) {
std::vector<int64_t> res;
res.push_back(0); if (!as_uint) {
res.push_back(-1);
} else {
res.push_back(0xFF);
}
res.push_back(0x12); if (imm_bytes >= 2) {
res.push_back(0x1234); if (!as_uint) {
res.push_back(-0x1234);
} else {
res.push_back(0xFFFF);
} if (imm_bytes >= 4) {
res.push_back(0x12345678); if (!as_uint) {
res.push_back(-0x12345678);
} else {
res.push_back(0xFFFFFFFF);
} if (imm_bytes >= 6) {
res.push_back(0x123456789ABC); if (!as_uint) {
res.push_back(-0x123456789ABC);
} if (imm_bytes >= 8) {
res.push_back(0x123456789ABCDEF0); if (!as_uint) {
res.push_back(-0x123456789ABCDEF0);
} else {
res.push_back(0xFFFFFFFFFFFFFFFF);
}
}
}
}
} return res;
}
constint kMaxBitsExhaustiveTest = 8;
// Create a couple of immediate values up to the number of bits given. virtual std::vector<int64_t> CreateImmediateValuesBits(constint imm_bits, bool as_uint = false, int shift = 0) {
CHECK_GT(imm_bits, 0);
CHECK_LE(imm_bits, 64);
std::vector<int64_t> res;
if (imm_bits <= kMaxBitsExhaustiveTest) { if (as_uint) { for (uint64_t i = MinInt<uint64_t>(imm_bits); i <= MaxInt<uint64_t>(imm_bits); i++) {
res.push_back(static_cast<int64_t>(i << shift));
}
} else { for (int64_t i = MinInt<int64_t>(imm_bits); i <= MaxInt<int64_t>(imm_bits); i++) {
res.push_back(i << shift);
}
}
} else { if (as_uint) { for (uint64_t i = MinInt<uint64_t>(kMaxBitsExhaustiveTest);
i <= MaxInt<uint64_t>(kMaxBitsExhaustiveTest);
i++) {
res.push_back(static_cast<int64_t>(i << shift));
} for (int i = 0; i <= imm_bits; i++) {
uint64_t j = (MaxInt<uint64_t>(kMaxBitsExhaustiveTest) + 1) +
((MaxInt<uint64_t>(imm_bits) -
(MaxInt<uint64_t>(kMaxBitsExhaustiveTest) + 1))
* i / imm_bits);
res.push_back(static_cast<int64_t>(j << shift));
}
} else { for (int i = 0; i <= imm_bits; i++) {
int64_t j = MinInt<int64_t>(imm_bits) +
((((MinInt<int64_t>(kMaxBitsExhaustiveTest) - 1) -
MinInt<int64_t>(imm_bits))
* i) / imm_bits);
res.push_back(static_cast<int64_t>(j << shift));
} for (int64_t i = MinInt<int64_t>(kMaxBitsExhaustiveTest);
i <= MaxInt<int64_t>(kMaxBitsExhaustiveTest);
i++) {
res.push_back(static_cast<int64_t>(i << shift));
} for (int i = 0; i <= imm_bits; i++) {
int64_t j = (MaxInt<int64_t>(kMaxBitsExhaustiveTest) + 1) +
((MaxInt<int64_t>(imm_bits) - (MaxInt<int64_t>(kMaxBitsExhaustiveTest) + 1))
* i / imm_bits);
res.push_back(static_cast<int64_t>(j << shift));
}
}
}
return res;
}
// Create an immediate from the specific value. virtual Imm CreateImmediate(int64_t imm_value) = 0;
// // Addresses repeats. //
// Repeats over addresses provided by fixture.
std::string RepeatA(void (Ass::*f)(const Addr&), const std::string& fmt) { return RepeatA(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatA(void (Ass::*f)(const Addr&), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedMem<Addr>(f, a, &AssemblerTest::GetAddrName, fmt);
}
// Repeats over addresses and immediates provided by fixture.
std::string RepeatAI(void (Ass::*f)(const Addr&, const Imm&),
size_t imm_bytes, const std::string& fmt) { return RepeatAI(f, imm_bytes, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatAI(void (Ass::*f)(const Addr&, const Imm&),
size_t imm_bytes, const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedMemImm<Addr>(f, imm_bytes, a, &AssemblerTest::GetAddrName, fmt);
}
// Repeats over registers and addresses provided by fixture.
std::string RepeatRA(void (Ass::*f)(Reg, const Addr&), const std::string& fmt) { return RepeatRA(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatRA(void (Ass::*f)(Reg, const Addr&), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedRegMem<Reg, Addr>(
f,
GetRegisters(),
a,
&AssemblerTest::GetRegName<RegisterView::kUsePrimaryName>,
&AssemblerTest::GetAddrName,
fmt);
}
// Repeats over secondary registers and addresses provided by fixture.
std::string RepeatrA(void (Ass::*f)(Reg, const Addr&), const std::string& fmt) { return RepeatrA(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatrA(void (Ass::*f)(Reg, const Addr&), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedRegMem<Reg, Addr>(
f,
GetRegisters(),
a,
&AssemblerTest::GetRegName<RegisterView::kUseSecondaryName>,
&AssemblerTest::GetAddrName,
fmt);
}
// Repeats over tertiary registers and addresses provided by fixture.
std::string RepeatwA(void (Ass::*f)(Reg, const Addr&), const std::string& fmt) { return RepeatwA(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatwA(void (Ass::*f)(Reg, const Addr&), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedRegMem<Reg, Addr>(
f,
GetRegisters(),
a,
&AssemblerTest::GetRegName<RegisterView::kUseTertiaryName>,
&AssemblerTest::GetAddrName,
fmt);
}
// Repeats over quaternary registers and addresses provided by fixture.
std::string RepeatbA(void (Ass::*f)(Reg, const Addr&), const std::string& fmt) { return RepeatbA(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatbA(void (Ass::*f)(Reg, const Addr&), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedRegMem<Reg, Addr>(
f,
GetRegisters(),
a,
&AssemblerTest::GetRegName<RegisterView::kUseQuaternaryName>,
&AssemblerTest::GetAddrName,
fmt);
}
// Repeats over fp-registers and addresses provided by fixture.
std::string RepeatFA(void (Ass::*f)(FPReg, const Addr&), const std::string& fmt) { return RepeatFA(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatFA(void (Ass::*f)(FPReg, const Addr&), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedRegMem<FPReg, Addr>(
f,
GetFPRegisters(),
a,
&AssemblerTest::GetFPRegName,
&AssemblerTest::GetAddrName,
fmt);
}
// Repeats over addresses and registers provided by fixture.
std::string RepeatAR(void (Ass::*f)(const Addr&, Reg), const std::string& fmt) { return RepeatAR(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatAR(void (Ass::*f)(const Addr&, Reg), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedMemReg<Addr, Reg>(
f,
a,
GetRegisters(),
&AssemblerTest::GetAddrName,
&AssemblerTest::GetRegName<RegisterView::kUsePrimaryName>,
fmt);
}
// Repeats over addresses and secondary registers provided by fixture.
std::string RepeatAr(void (Ass::*f)(const Addr&, Reg), const std::string& fmt) { return RepeatAr(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatAr(void (Ass::*f)(const Addr&, Reg), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedMemReg<Addr, Reg>(
f,
a,
GetRegisters(),
&AssemblerTest::GetAddrName,
&AssemblerTest::GetRegName<RegisterView::kUseSecondaryName>,
fmt);
}
// Repeats over addresses and tertiary registers provided by fixture.
std::string RepeatAw(void (Ass::*f)(const Addr&, Reg), const std::string& fmt) { return RepeatAw(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatAw(void (Ass::*f)(const Addr&, Reg), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedMemReg<Addr, Reg>(
f,
a,
GetRegisters(),
&AssemblerTest::GetAddrName,
&AssemblerTest::GetRegName<RegisterView::kUseTertiaryName>,
fmt);
}
// Repeats over addresses and quaternary registers provided by fixture.
std::string RepeatAb(void (Ass::*f)(const Addr&, Reg), const std::string& fmt) { return RepeatAb(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatAb(void (Ass::*f)(const Addr&, Reg), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedMemReg<Addr, Reg>(
f,
a,
GetRegisters(),
&AssemblerTest::GetAddrName,
&AssemblerTest::GetRegName<RegisterView::kUseQuaternaryName>,
fmt);
}
// Repeats over addresses and fp-registers provided by fixture.
std::string RepeatAF(void (Ass::*f)(const Addr&, FPReg), const std::string& fmt) { return RepeatAF(f, GetAddresses(), fmt);
}
// Variant that takes explicit vector of addresss // (to test restricted addressing modes set).
std::string RepeatAF(void (Ass::*f)(const Addr&, FPReg), const std::vector<Addr>& a, const std::string& fmt) { return RepeatTemplatedMemReg<Addr, FPReg>(
f,
a,
GetFPRegisters(),
&AssemblerTest::GetAddrName,
&AssemblerTest::GetFPRegName,
fmt);
}
std::string str; for (auto reg1 : reg1_registers) { for (auto reg2 : reg2_registers) { // Check if this register pair is on the exception list. If so, skip it. if (except != nullptr) { constauto& pair = std::make_pair(reg1, reg2); if (std::find(except->begin(), except->end(), pair) != except->end()) { continue;
}
}
if (f != nullptr) {
(assembler_.get()->*f)(reg1, reg2);
}
std::string base = fmt;
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